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[PULL 09/48] hw/ppc: moved has_spr to cpu.h
From: |
David Gibson |
Subject: |
[PULL 09/48] hw/ppc: moved has_spr to cpu.h |
Date: |
Wed, 19 May 2021 22:51:09 +1000 |
From: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>
Moved has_spr to cpu.h as ppc_has_spr and turned it into an inline function.
Change spr verification in pnv.c and spapr.c to a version that can
compile in a !TCG environment.
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Message-Id: <20210507164146.67086-1-lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/pnv.c | 2 +-
hw/ppc/spapr.c | 4 ++--
hw/ppc/spapr_hcall.c | 12 +++---------
target/ppc/cpu.h | 6 ++++++
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index ffe01977cd..d16dd2d080 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -196,7 +196,7 @@ static void pnv_dt_core(PnvChip *chip, PnvCore *pc, void
*fdt)
_FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
_FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));
- if (env->spr_cb[SPR_PURR].oea_read) {
+ if (ppc_has_spr(cpu, SPR_PURR)) {
_FDT((fdt_setprop(fdt, offset, "ibm,purr", NULL, 0)));
}
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 4db448d63e..c23bcc4490 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -703,10 +703,10 @@ static void spapr_dt_cpu(CPUState *cs, void *fdt, int
offset,
_FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
_FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));
- if (env->spr_cb[SPR_PURR].oea_read) {
+ if (ppc_has_spr(cpu, SPR_PURR)) {
_FDT((fdt_setprop_cell(fdt, offset, "ibm,purr", 1)));
}
- if (env->spr_cb[SPR_SPURR].oea_read) {
+ if (ppc_has_spr(cpu, SPR_PURR)) {
_FDT((fdt_setprop_cell(fdt, offset, "ibm,spurr", 1)));
}
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 6dbaa93d15..f25014afda 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -20,12 +20,6 @@
#include "mmu-book3s-v3.h"
#include "hw/mem/memory-device.h"
-static bool has_spr(PowerPCCPU *cpu, int spr)
-{
- /* We can test whether the SPR is defined by checking for a valid name */
- return cpu->env.spr_cb[spr].name != NULL;
-}
-
bool is_ram_address(SpaprMachineState *spapr, hwaddr addr)
{
MachineState *machine = MACHINE(spapr);
@@ -212,12 +206,12 @@ static target_ulong h_set_sprg0(PowerPCCPU *cpu,
SpaprMachineState *spapr,
static target_ulong h_set_dabr(PowerPCCPU *cpu, SpaprMachineState *spapr,
target_ulong opcode, target_ulong *args)
{
- if (!has_spr(cpu, SPR_DABR)) {
+ if (!ppc_has_spr(cpu, SPR_DABR)) {
return H_HARDWARE; /* DABR register not available */
}
cpu_synchronize_state(CPU(cpu));
- if (has_spr(cpu, SPR_DABRX)) {
+ if (ppc_has_spr(cpu, SPR_DABRX)) {
cpu->env.spr[SPR_DABRX] = 0x3; /* Use Problem and Privileged state */
} else if (!(args[0] & 0x4)) { /* Breakpoint Translation set? */
return H_RESERVED_DABR;
@@ -232,7 +226,7 @@ static target_ulong h_set_xdabr(PowerPCCPU *cpu,
SpaprMachineState *spapr,
{
target_ulong dabrx = args[1];
- if (!has_spr(cpu, SPR_DABR) || !has_spr(cpu, SPR_DABRX)) {
+ if (!ppc_has_spr(cpu, SPR_DABR) || !ppc_has_spr(cpu, SPR_DABRX)) {
return H_HARDWARE;
}
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index a976e7f7b0..98fcf1c4d6 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2642,6 +2642,12 @@ static inline ppc_avr_t *cpu_avr_ptr(CPUPPCState *env,
int i)
return (ppc_avr_t *)((uintptr_t)env + avr_full_offset(i));
}
+static inline bool ppc_has_spr(PowerPCCPU *cpu, int spr)
+{
+ /* We can test whether the SPR is defined by checking for a valid name */
+ return cpu->env.spr_cb[spr].name != NULL;
+}
+
void dump_mmu(CPUPPCState *env);
void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len);
--
2.31.1
- [PULL 00/48] ppc-for-6.1 queue 20210519, David Gibson, 2021/05/19
- [PULL 03/48] target/ppc: Fold gen_*_xer into their callers, David Gibson, 2021/05/19
- [PULL 02/48] hw/ppc/spapr.c: Make sure the host supports the selected MMU mode, David Gibson, 2021/05/19
- [PULL 01/48] hw/ppc/spapr.c: Extract MMU mode error reporting into a function, David Gibson, 2021/05/19
- [PULL 04/48] target/ppc: renamed SPR registration functions, David Gibson, 2021/05/19
- [PULL 08/48] target/ppc: moved ppc_store_lpcr to misc_helper.c, David Gibson, 2021/05/19
- [PULL 09/48] hw/ppc: moved has_spr to cpu.h,
David Gibson <=
- [PULL 10/48] target/ppc: turned SPR R/W callbacks not static, David Gibson, 2021/05/19
- [PULL 11/48] target/ppc: isolated cpu init from translation logic, David Gibson, 2021/05/19
- [PULL 07/48] target/ppc: moved function out of mmu-hash64, David Gibson, 2021/05/19
- [PULL 16/48] target/ppc: Add cia field to DisasContext, David Gibson, 2021/05/19
- [PULL 17/48] target/ppc: Split out decode_legacy, David Gibson, 2021/05/19
- [PULL 14/48] target/ppc: moved ppc_store_sdr1 to cpu.c, David Gibson, 2021/05/19
- [PULL 20/48] target/ppc: Remove special case for POWERPC_EXCP_TRAP, David Gibson, 2021/05/19
- [PULL 18/48] target/ppc: Move DISAS_NORETURN setting into gen_exception*, David Gibson, 2021/05/19
- [PULL 22/48] target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE}, David Gibson, 2021/05/19
- [PULL 06/48] hw/ppc: moved hcalls that depend on softmmu, David Gibson, 2021/05/19