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Re: [PATCH v2 7/7] target/ppc: isolated cpu init from translation logic
From: |
Fabiano Rosas |
Subject: |
Re: [PATCH v2 7/7] target/ppc: isolated cpu init from translation logic |
Date: |
Thu, 29 Apr 2021 18:23:14 -0300 |
"Bruno Larsen (billionai)" <bruno.larsen@eldorado.org.br> writes:
> finished isolation of CPU initialization logic from
> translation logic. CPU initialization now only has common code
> which may or may not call accelerator-specific code, as the
> build options require, and is compiled separately.
>
> Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
> ---
> target/ppc/{translate_init.c.inc => cpu_init.c} | 12 +++++++++++-
> target/ppc/meson.build | 1 +
> target/ppc/translate.c | 4 +++-
> 3 files changed, 15 insertions(+), 2 deletions(-)
> rename target/ppc/{translate_init.c.inc => cpu_init.c} (99%)
>
> diff --git a/target/ppc/translate_init.c.inc b/target/ppc/cpu_init.c
> similarity index 99%
> rename from target/ppc/translate_init.c.inc
> rename to target/ppc/cpu_init.c
> index b329e953cb..f0f8fc481e 100644
> --- a/target/ppc/translate_init.c.inc
> +++ b/target/ppc/cpu_init.c
> @@ -18,6 +18,7 @@
> * License along with this library; if not, see
> <http://www.gnu.org/licenses/>.
> */
>
> +#include "qemu/osdep.h"
> #include "disas/dis-asm.h"
> #include "exec/gdbstub.h"
> #include "kvm_ppc.h"
> @@ -42,6 +43,10 @@
> #include "fpu/softfloat.h"
> #include "qapi/qapi-commands-machine-target.h"
>
> +#include "helper_regs.h"
> +#include "internal.h"
> +#include "spr_tcg.h"
These two includes look like they belong in patch 3 and 4 respectively.
And we probably want an #ifdef CONFIG_TCG around them.
> +
> /* #define PPC_DEBUG_SPR */
> /* #define USE_APPLE_GDB */
>
> @@ -49,7 +54,12 @@ static inline void vscr_init(CPUPPCState *env, uint32_t
> val)
> {
> /* Altivec always uses round-to-nearest */
> set_float_rounding_mode(float_round_nearest_even, &env->vec_status);
> - helper_mtvscr(env, val);
> + /*
> + * This comment is here just so the project will build.
> + * The current solution is in another patch and will be
> + * added when we figure out an internal fork of qemu
> + */
> + /* helper_mtvscr(env, val); */
> }
>
> #ifdef CONFIG_TCG
> diff --git a/target/ppc/meson.build b/target/ppc/meson.build
> index bbfef90e08..ad53629298 100644
> --- a/target/ppc/meson.build
> +++ b/target/ppc/meson.build
> @@ -2,6 +2,7 @@ ppc_ss = ss.source_set()
> ppc_ss.add(files(
> 'cpu-models.c',
> 'cpu.c',
> + 'cpu_init.c',
> 'dfp_helper.c',
> 'excp_helper.c',
> 'fpu_helper.c',
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index a6e677fa6d..afb8a2aa27 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -38,6 +38,9 @@
> #include "qemu/atomic128.h"
> #include "internal.h"
>
> +#include "qemu/qemu-print.h"
> +#include "qapi/error.h"
> +#include "internal.h"
This one is already included.
>
> #define CPU_SINGLE_STEP 0x1
> #define CPU_BRANCH_STEP 0x2
> @@ -7595,7 +7598,6 @@ GEN_HANDLER2_E(trechkpt, "trechkpt", 0x1F, 0x0E, 0x1F,
> 0x03FFF800, \
>
> #include "helper_regs.h"
> #include "spr_tcg.c.inc"
> -#include "translate_init.c.inc"
>
>
> /*****************************************************************************/
> /* Misc PowerPC helpers */
- Re: [PATCH v2 3/7] target/ppc: Isolated SPR read/write callbacks, (continued)
- [PATCH v2 4/7] target/ppc: turned SPR R/W callbacks not static, Bruno Larsen (billionai), 2021/04/29
- [PATCH v2 5/7] target/ppc: removed VSCR from SPR registration, Bruno Larsen (billionai), 2021/04/29
- [PATCH v2 6/7] target/ttc: renamed SPR registration functions, Bruno Larsen (billionai), 2021/04/29
- [PATCH v2 7/7] target/ppc: isolated cpu init from translation logic, Bruno Larsen (billionai), 2021/04/29
- Re: [PATCH v2 7/7] target/ppc: isolated cpu init from translation logic,
Fabiano Rosas <=
- Re: [PATCH v2 7/7] target/ppc: isolated cpu init from translation logic, Richard Henderson, 2021/04/30
- Re: [PATCH v2 0/7] target/ppc: untangle cpu init from translation, Richard Henderson, 2021/04/29