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[PATCH v2 15/15] target/ppc: Check cpu flags for prefixed insn support
From: |
Luis Pires |
Subject: |
[PATCH v2 15/15] target/ppc: Check cpu flags for prefixed insn support |
Date: |
Tue, 27 Apr 2021 14:16:49 -0300 |
Prefixed instructions were introduced in Power ISA 3.1
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
---
target/ppc/translate.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 7422ea4e13..f4802a4f08 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -7837,7 +7837,11 @@ static bool ppc_tr_breakpoint_check(DisasContextBase
*dcbase, CPUState *cs,
static bool is_prefix_insn(DisasContext *ctx, uint32_t insn)
{
- /* TODO: Check ctx->insns_flags* for whether prefixes are supported. */
+ if (!(ctx->insns_flags2 & PPC2_ISA310)) {
+ /* Prefixed instructions are not supported */
+ return false;
+ }
+
return opc1(insn) == 1;
}
--
2.25.1
- [PATCH v2 09/15] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, (continued)
- [PATCH v2 09/15] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Luis Pires, 2021/04/27
- [PATCH v2 10/15] target/ppc: Implement PNOP, Luis Pires, 2021/04/27
- [PATCH v2 11/15] target/ppc: Move D/DS/X-form integer loads to decodetree, Luis Pires, 2021/04/27
- [PATCH v2 12/15] target/ppc: Implement prefixed integer load instructions, Luis Pires, 2021/04/27
- [PATCH v2 13/15] target/ppc: Move D/DS/X-form integer stores to decodetree, Luis Pires, 2021/04/27
- [PATCH v2 14/15] target/ppc: Implement prefixed integer store instructions, Luis Pires, 2021/04/27
- [PATCH v2 15/15] target/ppc: Check cpu flags for prefixed insn support,
Luis Pires <=