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Re: [PATCH v4 04/11] target/ppc: convert vmuluwm to tcg_gen_gvec_mul
From: |
David Gibson |
Subject: |
Re: [PATCH v4 04/11] target/ppc: convert vmuluwm to tcg_gen_gvec_mul |
Date: |
Wed, 8 Jul 2020 22:22:12 +1000 |
On Wed, Jul 01, 2020 at 06:43:39PM -0500, Lijun Pan wrote:
> Convert the original implementation of vmuluwm to the more generic
> tcg_gen_gvec_mul.
>
> Signed-off-by: Lijun Pan <ljp@linux.ibm.com>
Applied to ppc-for-5.2.
> ---
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> v3: newly introduced
>
> target/ppc/helper.h | 1 -
> target/ppc/int_helper.c | 13 -------------
> target/ppc/translate/vmx-impl.inc.c | 2 +-
> 3 files changed, 1 insertion(+), 15 deletions(-)
>
> diff --git a/target/ppc/helper.h b/target/ppc/helper.h
> index 2dfa1c6942..69416b6d7c 100644
> --- a/target/ppc/helper.h
> +++ b/target/ppc/helper.h
> @@ -184,7 +184,6 @@ DEF_HELPER_3(vmulosw, void, avr, avr, avr)
> DEF_HELPER_3(vmuloub, void, avr, avr, avr)
> DEF_HELPER_3(vmulouh, void, avr, avr, avr)
> DEF_HELPER_3(vmulouw, void, avr, avr, avr)
> -DEF_HELPER_3(vmuluwm, void, avr, avr, avr)
> DEF_HELPER_3(vslo, void, avr, avr, avr)
> DEF_HELPER_3(vsro, void, avr, avr, avr)
> DEF_HELPER_3(vsrv, void, avr, avr, avr)
> diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
> index be53cd6f68..bd3e6d7cc7 100644
> --- a/target/ppc/int_helper.c
> +++ b/target/ppc/int_helper.c
> @@ -523,19 +523,6 @@ void helper_vprtybq(ppc_avr_t *r, ppc_avr_t *b)
> r->VsrD(0) = 0;
> }
>
> -#define VARITH_DO(name, op, element) \
> - void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
> - { \
> - int i; \
> - \
> - for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
> - r->element[i] = a->element[i] op b->element[i]; \
> - } \
> - }
> -VARITH_DO(muluwm, *, u32)
> -#undef VARITH_DO
> -#undef VARITH
> -
> #define VARITHFP(suffix, func) \
> void helper_v##suffix(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, \
> ppc_avr_t *b) \
> diff --git a/target/ppc/translate/vmx-impl.inc.c
> b/target/ppc/translate/vmx-impl.inc.c
> index 403ed3a01c..6e79ffa650 100644
> --- a/target/ppc/translate/vmx-impl.inc.c
> +++ b/target/ppc/translate/vmx-impl.inc.c
> @@ -801,7 +801,7 @@ static void trans_vclzd(DisasContext *ctx)
> GEN_VXFORM(vmuloub, 4, 0);
> GEN_VXFORM(vmulouh, 4, 1);
> GEN_VXFORM(vmulouw, 4, 2);
> -GEN_VXFORM(vmuluwm, 4, 2);
> +GEN_VXFORM_V(vmuluwm, MO_32, tcg_gen_gvec_mul, 4, 2);
> GEN_VXFORM_DUAL(vmulouw, PPC_ALTIVEC, PPC_NONE,
> vmuluwm, PPC_NONE, PPC2_ALTIVEC_207)
> GEN_VXFORM(vmulosb, 4, 4);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [PATCH v4 00/11] Add several Power ISA 3.1 32/64-bit vector instructions, Lijun Pan, 2020/07/01
- [PATCH v4 04/11] target/ppc: convert vmuluwm to tcg_gen_gvec_mul, Lijun Pan, 2020/07/01
- Re: [PATCH v4 04/11] target/ppc: convert vmuluwm to tcg_gen_gvec_mul,
David Gibson <=
- [PATCH v4 02/11] target/ppc: Enable Power ISA 3.1, Lijun Pan, 2020/07/01
- [PATCH v4 05/11] target/ppc: add vmulld instruction, Lijun Pan, 2020/07/01
- [PATCH v4 08/11] target/ppc: add vmulh{su}w instructions, Lijun Pan, 2020/07/01
- [PATCH v4 01/11] target/ppc: Introduce Power ISA 3.1 flag, Lijun Pan, 2020/07/01
- [PATCH v4 03/11] target/ppc: add byte-reverse br[dwh] instructions, Lijun Pan, 2020/07/01