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[PULL 18/88] ppc/xive: Introduce helpers for the NVT id
From: |
David Gibson |
Subject: |
[PULL 18/88] ppc/xive: Introduce helpers for the NVT id |
Date: |
Tue, 17 Dec 2019 15:42:12 +1100 |
From: Cédric Le Goater <address@hidden>
Each vCPU in the system is identified with an NVT identifier which is
pushed in the OS CAM line (QW1W2) of the HW thread interrupt context
register when the vCPU is dispatched on a HW thread. This identifier
is used by the presenter subengine to find a matching target to notify
of an event. It is also used to fetch the associate NVT structure
which may contain pending interrupts that need a resend.
Add a couple of helpers for the NVT ids. The NVT space is 19 bits
wide, giving a maximum of 512K per chip.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
include/hw/ppc/xive.h | 5 -----
include/hw/ppc/xive_regs.h | 21 +++++++++++++++++++++
2 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index 8fd439ec9b..fa7adf87fe 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -418,11 +418,6 @@ Object *xive_tctx_create(Object *cpu, XiveRouter *xrtr,
Error **errp);
void xive_tctx_reset(XiveTCTX *tctx);
void xive_tctx_destroy(XiveTCTX *tctx);
-static inline uint32_t xive_nvt_cam_line(uint8_t nvt_blk, uint32_t nvt_idx)
-{
- return (nvt_blk << 19) | nvt_idx;
-}
-
/*
* KVM XIVE device helpers
*/
diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
index 530f232b04..1a5622f8de 100644
--- a/include/hw/ppc/xive_regs.h
+++ b/include/hw/ppc/xive_regs.h
@@ -272,4 +272,25 @@ typedef struct XiveNVT {
#define xive_nvt_is_valid(nvt) (be32_to_cpu((nvt)->w0) & NVT_W0_VALID)
+/*
+ * The VP number space in a block is defined by the END_W6_NVT_INDEX
+ * field of the XIVE END
+ */
+#define XIVE_NVT_SHIFT 19
+
+static inline uint32_t xive_nvt_cam_line(uint8_t nvt_blk, uint32_t nvt_idx)
+{
+ return (nvt_blk << XIVE_NVT_SHIFT) | nvt_idx;
+}
+
+static inline uint32_t xive_nvt_idx(uint32_t cam_line)
+{
+ return cam_line & ((1 << XIVE_NVT_SHIFT) - 1);
+}
+
+static inline uint32_t xive_nvt_blk(uint32_t cam_line)
+{
+ return (cam_line >> XIVE_NVT_SHIFT) & 0xf;
+}
+
#endif /* PPC_XIVE_REGS_H */
--
2.23.0
- [PULL 12/88] xics: Link ICS_PROP_XICS property to ICSState::xics pointer, (continued)
- [PULL 12/88] xics: Link ICS_PROP_XICS property to ICSState::xics pointer, David Gibson, 2019/12/16
- [PULL 06/88] xive: Link "xive" property to XiveEndSource::xrtr pointer, David Gibson, 2019/12/16
- [PULL 11/88] ppc/pnv: Link "chip" property to PnvXive::chip pointer, David Gibson, 2019/12/16
- [PULL 10/88] ppc/pnv: Link "chip" property to PnvCore::chip pointer, David Gibson, 2019/12/16
- [PULL 09/88] ppc/pnv: Link "chip" property to PnvHomer::chip pointer, David Gibson, 2019/12/16
- [PULL 07/88] ppc/pnv: Link "psi" property to PnvLpc::psi pointer, David Gibson, 2019/12/16
- [PULL 08/88] ppc/pnv: Link "psi" property to PnvOCC::psi pointer, David Gibson, 2019/12/16
- [PULL 19/88] ppc/pnv: Remove pnv_xive_vst_size() routine, David Gibson, 2019/12/16
- [PULL 15/88] spapr: Abort if XICS interrupt controller cannot be initialized, David Gibson, 2019/12/16
- [PULL 20/88] xive/kvm: Trigger interrupts from userspace, David Gibson, 2019/12/16
- [PULL 18/88] ppc/xive: Introduce helpers for the NVT id,
David Gibson <=
- [PULL 16/88] ppc/pnv: Add a LPC "ranges" property, David Gibson, 2019/12/16
- [PULL 14/88] xics: Link ICP_PROP_CPU property to ICPState::cs pointer, David Gibson, 2019/12/16
- [PULL 23/88] ppc/xive: Check V bit in TM_PULL_POOL_CTX, David Gibson, 2019/12/16
- [PULL 13/88] xics: Link ICP_PROP_XICS property to ICPState::xics pointer, David Gibson, 2019/12/16
- [PULL 17/88] ppc/xive: Record the IPB in the associated NVT, David Gibson, 2019/12/16
- [PULL 27/88] ppc/xive: Introduce a XivePresenter interface, David Gibson, 2019/12/16
- [PULL 26/88] ppc/pnv: Create BMC devices at machine init, David Gibson, 2019/12/16
- [PULL 28/88] ppc/xive: Implement the XivePresenter interface, David Gibson, 2019/12/16
- [PULL 21/88] ppc/pnv: Quiesce some XIVE errors, David Gibson, 2019/12/16
- [PULL 22/88] ppc/xive: Introduce OS CAM line helpers, David Gibson, 2019/12/16