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[PULL 08/88] ppc/pnv: Link "psi" property to PnvOCC::psi pointer
From: |
David Gibson |
Subject: |
[PULL 08/88] ppc/pnv: Link "psi" property to PnvOCC::psi pointer |
Date: |
Tue, 17 Dec 2019 15:42:02 +1100 |
From: Greg Kurz <address@hidden>
The OCC object has both a pointer and a "psi" property pointing to the
PSI object. Confusing bugs could arise if these ever go out of sync.
Change the property definition so that it explicitely sets the pointer.
Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv.c | 8 ++++----
hw/ppc/pnv_occ.c | 20 +++++++++-----------
2 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 201facc701..ce24a4ee99 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -904,8 +904,6 @@ static void pnv_chip_power8_instance_init(Object *obj)
object_initialize_child(obj, "occ", &chip8->occ, sizeof(chip8->occ),
TYPE_PNV8_OCC, &error_abort, NULL);
- object_property_add_const_link(OBJECT(&chip8->occ), "psi",
- OBJECT(&chip8->psi), &error_abort);
object_initialize_child(obj, "homer", &chip8->homer, sizeof(chip8->homer),
TYPE_PNV8_HOMER, &error_abort, NULL);
@@ -1000,6 +998,8 @@ static void pnv_chip_power8_realize(DeviceState *dev,
Error **errp)
}
/* Create the simplified OCC model */
+ object_property_set_link(OBJECT(&chip8->occ), OBJECT(&chip8->psi), "psi",
+ &error_abort);
object_property_set_bool(OBJECT(&chip8->occ), true, "realized",
&local_err);
if (local_err) {
error_propagate(errp, local_err);
@@ -1102,8 +1102,6 @@ static void pnv_chip_power9_instance_init(Object *obj)
object_initialize_child(obj, "occ", &chip9->occ, sizeof(chip9->occ),
TYPE_PNV9_OCC, &error_abort, NULL);
- object_property_add_const_link(OBJECT(&chip9->occ), "psi",
- OBJECT(&chip9->psi), &error_abort);
object_initialize_child(obj, "homer", &chip9->homer, sizeof(chip9->homer),
TYPE_PNV9_HOMER, &error_abort, NULL);
@@ -1211,6 +1209,8 @@ static void pnv_chip_power9_realize(DeviceState *dev,
Error **errp)
(uint64_t) PNV9_LPCM_BASE(chip));
/* Create the simplified OCC model */
+ object_property_set_link(OBJECT(&chip9->occ), OBJECT(&chip9->psi), "psi",
+ &error_abort);
object_property_set_bool(OBJECT(&chip9->occ), true, "realized",
&local_err);
if (local_err) {
error_propagate(errp, local_err);
diff --git a/hw/ppc/pnv_occ.c b/hw/ppc/pnv_occ.c
index 785653bb67..765c0a6ce5 100644
--- a/hw/ppc/pnv_occ.c
+++ b/hw/ppc/pnv_occ.c
@@ -21,7 +21,7 @@
#include "qapi/error.h"
#include "qemu/log.h"
#include "qemu/module.h"
-
+#include "hw/qdev-properties.h"
#include "hw/ppc/pnv.h"
#include "hw/ppc/pnv_xscom.h"
#include "hw/ppc/pnv_occ.h"
@@ -257,18 +257,10 @@ static void pnv_occ_realize(DeviceState *dev, Error
**errp)
{
PnvOCC *occ = PNV_OCC(dev);
PnvOCCClass *poc = PNV_OCC_GET_CLASS(occ);
- Object *obj;
- Error *local_err = NULL;
- occ->occmisc = 0;
+ assert(occ->psi);
- obj = object_property_get_link(OBJECT(dev), "psi", &local_err);
- if (!obj) {
- error_propagate(errp, local_err);
- error_prepend(errp, "required link 'psi' not found: ");
- return;
- }
- occ->psi = PNV_PSI(obj);
+ occ->occmisc = 0;
/* XScom region for OCC registers */
pnv_xscom_region_init(&occ->xscom_regs, OBJECT(dev), poc->xscom_ops,
@@ -279,12 +271,18 @@ static void pnv_occ_realize(DeviceState *dev, Error
**errp)
occ, "occ-common-area", poc->sram_size);
}
+static Property pnv_occ_properties[] = {
+ DEFINE_PROP_LINK("psi", PnvOCC, psi, TYPE_PNV_PSI, PnvPsi *),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void pnv_occ_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = pnv_occ_realize;
dc->desc = "PowerNV OCC Controller";
+ dc->props = pnv_occ_properties;
}
static const TypeInfo pnv_occ_type_info = {
--
2.23.0
- [PULL 03/88] ppc/pnv: Drop "chip" link from POWER9 PSI object, (continued)
- [PULL 03/88] ppc/pnv: Drop "chip" link from POWER9 PSI object, David Gibson, 2019/12/16
- [PULL 04/88] xive: Link "cpu" property to XiveTCTX::cs pointer, David Gibson, 2019/12/16
- [PULL 01/88] ppc/pnv: Add a PNOR model, David Gibson, 2019/12/16
- [PULL 05/88] xive: Link "xive" property to XiveSource::xive pointer, David Gibson, 2019/12/16
- [PULL 12/88] xics: Link ICS_PROP_XICS property to ICSState::xics pointer, David Gibson, 2019/12/16
- [PULL 06/88] xive: Link "xive" property to XiveEndSource::xrtr pointer, David Gibson, 2019/12/16
- [PULL 11/88] ppc/pnv: Link "chip" property to PnvXive::chip pointer, David Gibson, 2019/12/16
- [PULL 10/88] ppc/pnv: Link "chip" property to PnvCore::chip pointer, David Gibson, 2019/12/16
- [PULL 09/88] ppc/pnv: Link "chip" property to PnvHomer::chip pointer, David Gibson, 2019/12/16
- [PULL 07/88] ppc/pnv: Link "psi" property to PnvLpc::psi pointer, David Gibson, 2019/12/16
- [PULL 08/88] ppc/pnv: Link "psi" property to PnvOCC::psi pointer,
David Gibson <=
- [PULL 19/88] ppc/pnv: Remove pnv_xive_vst_size() routine, David Gibson, 2019/12/16
- [PULL 15/88] spapr: Abort if XICS interrupt controller cannot be initialized, David Gibson, 2019/12/16
- [PULL 20/88] xive/kvm: Trigger interrupts from userspace, David Gibson, 2019/12/16
- [PULL 18/88] ppc/xive: Introduce helpers for the NVT id, David Gibson, 2019/12/16
- [PULL 16/88] ppc/pnv: Add a LPC "ranges" property, David Gibson, 2019/12/16
- [PULL 14/88] xics: Link ICP_PROP_CPU property to ICPState::cs pointer, David Gibson, 2019/12/16
- [PULL 23/88] ppc/xive: Check V bit in TM_PULL_POOL_CTX, David Gibson, 2019/12/16
- [PULL 13/88] xics: Link ICP_PROP_XICS property to ICPState::xics pointer, David Gibson, 2019/12/16
- [PULL 17/88] ppc/xive: Record the IPB in the associated NVT, David Gibson, 2019/12/16
- [PULL 27/88] ppc/xive: Introduce a XivePresenter interface, David Gibson, 2019/12/16