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Re: [Qemu-ppc] [Qemu-devel] [PATCH 7/8] target/ppc: introduce vsrh_offse
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From: |
Mark Cave-Ayland |
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Subject: |
Re: [Qemu-ppc] [Qemu-devel] [PATCH 7/8] target/ppc: introduce vsrh_offset() function |
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Date: |
Tue, 5 Mar 2019 17:42:23 +0000 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 |
On 03/03/2019 23:33, Richard Henderson wrote:
> On 3/3/19 9:23 AM, Mark Cave-Ayland wrote:
>> -static inline int fpr_offset(int i)
>> +static inline int vsrh_offset(int i)
>
> I don't agree with this. The original is clearer for its uses.
Well as the patchset was coming from a VSX perspective, I took the approach
that more
people would be familiar with high/low pair rather than understanding that VSX
was
evolution of the original FPRs.
But again for me, I'm happy with either way so I don't mind changing it.
ATB,
Mark.
- Re: [Qemu-ppc] [PATCH 8/8] target/ppc: simplify get_cpu_vsrh() and get_cpu_vsrl() functions, (continued)
[Qemu-ppc] [PATCH 5/8] target/ppc: introduce avr_offset() function, Mark Cave-Ayland, 2019/03/03
[Qemu-ppc] [PATCH 7/8] target/ppc: introduce vsrh_offset() function, Mark Cave-Ayland, 2019/03/03
[Qemu-ppc] [PATCH 2/8] target/ppc: introduce single vsrl_offset() function, Mark Cave-Ayland, 2019/03/03
[Qemu-ppc] [PATCH 4/8] target/ppc: introduce avrh_offset() and avrl_offset() functions, Mark Cave-Ayland, 2019/03/03
[Qemu-ppc] [PATCH 6/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order, Mark Cave-Ayland, 2019/03/03
Re: [Qemu-ppc] [PATCH 0/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order, David Gibson, 2019/03/04