[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PATCH 39/48] mmu-hash64: Factor SLB N bit into permissions b
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PATCH 39/48] mmu-hash64: Factor SLB N bit into permissions bits |
Date: |
Tue, 12 Mar 2013 21:31:41 +1100 |
BEHAVIOUR CHANGE
Currently, for 64-bit hash mmu, the execute protection bit placed into the
qemu tlb is based only on the N (No execute) bit from the PTE. However,
No Execute can also be set at the segment level. We do check this on
execute faults, but this still means we could incorrectly allow execution
of code from a No Execute segment, if a prior read or write fault caused
the page to be loaded into the qemu tlb with PROT_EXEC set.
To correct this, we (re-)check the segment level no execute permission when
generating the protection bits for the qemu tlb.
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/mmu-hash64.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 1458f15..5607ce8 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -272,7 +272,8 @@ static int ppc_hash64_pte_prot(CPUPPCState *env,
}
/* No execute if either noexec or guarded bits set */
- if (!(pte.pte1 & HPTE64_R_N) || (pte.pte1 & HPTE64_R_G)) {
+ if (!(pte.pte1 & HPTE64_R_N) || (pte.pte1 & HPTE64_R_G)
+ || (slb->vsid & SLB_VSID_N)) {
prot |= PAGE_EXEC;
}
--
1.7.10.4
- [Qemu-ppc] [PATCH 41/48] mmu-hash*: Clean up real address calculation, (continued)
- [Qemu-ppc] [PATCH 41/48] mmu-hash*: Clean up real address calculation, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 04/48] target-ppc: Move SLB handling into a mmu-hash64.c, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 36/48] mmu-hash*: Don't update PTE flags when permission is denied, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 47/48] target-ppc: Move ppc tlb_fill implementation into mmu_helper.c, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 44/48] mmu-hash*: Merge translate and fault handling functions, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 48/48] target-ppc: Use QOM method dispatch for MMU fault handling, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 15/48] target-ppc: mmu_ctx_t should not be a global type, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 17/48] mmu-hash*: Add hash pte load/store helpers, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 03/48] target-ppc: Remove address check for logging, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 39/48] mmu-hash64: Factor SLB N bit into permissions bits,
David Gibson <=
- [Qemu-ppc] [PATCH 08/48] target-ppc: Rework get_physical_address(), David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 30/48] mmu-hash*: Fold pte_check*() logic into caller, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 38/48] mmu-hash*: Clean up permission checking, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 14/48] target-ppc: Disentangle BAT code for 32-bit hash MMUs, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 35/48] mmu-hash32: Don't look up page tables on BAT permission error, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 24/48] mmu-hash*: Cleanup segment-level NX check, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 07/48] target-ppc: Disentangle get_segment(), David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 32/48] mmu-hash32: Split BAT size logic from permissions logic, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 11/48] target-ppc: Disentangle hash mmu versions of cpu_get_phys_page_debug(), David Gibson, 2013/03/12
- Re: [Qemu-ppc] [0/48] target-ppc: MMU implementation cleanup for hash MMUs, Alexander Graf, 2013/03/21