[Qemu-ppc] [PATCH 15/48] target-ppc: mmu_ctx_t should not be a global type

[David Gibson]

mmu_ctx_t is currently defined in cpu.h.  However it is used for temporary
information relating to mmu translation, and is only used in mmu_helper.c
and (now) mmu-hash{32,64}.c.  Furthermore it contains information which
should be specific to particular MMU types.  Therefore, move its definition
to mmu_helper.c.  mmu-hash{32,64}.c are converted to use new data types
private to the relevant MMUs (identical to mmu_ctx_t for now, but that will
change in future patches).

Signed-off-by: David Gibson <address@hidden>
---
 target-ppc/cpu.h        |   14 --------------
 target-ppc/mmu-hash32.c |   26 ++++++++++++++++++--------
 target-ppc/mmu-hash64.c |   26 +++++++++++++++++++-------
 target-ppc/mmu_helper.c |   13 +++++++++++++
 4 files changed, 50 insertions(+), 29 deletions(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 74b6e0e..035d939 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1101,20 +1101,6 @@ do {                                            \
     env->wdt_period[3] = (d_);                  \
  } while (0)
 
-#if !defined(CONFIG_USER_ONLY)
-/* Context used internally during MMU translations */
-typedef struct mmu_ctx_t mmu_ctx_t;
-struct mmu_ctx_t {
-    hwaddr raddr;      /* Real address              */
-    hwaddr eaddr;      /* Effective address         */
-    int prot;                      /* Protection bits           */
-    hwaddr hash[2];    /* Pagetable hash values     */
-    target_ulong ptem;             /* Virtual segment ID | API  */
-    int key;                       /* Access key                */
-    int nx;                        /* Non-execute area          */
-};
-#endif
-
 #include "cpu-qom.h"
 
 /*****************************************************************************/
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c
index f94b65d..5b48aa8 100644
--- a/target-ppc/mmu-hash32.c
+++ b/target-ppc/mmu-hash32.c
@@ -41,6 +41,16 @@
 #  define LOG_BATS(...) do { } while (0)
 #endif
 
+struct mmu_ctx_hash32 {
+    hwaddr raddr;      /* Real address              */
+    hwaddr eaddr;      /* Effective address         */
+    int prot;                      /* Protection bits           */
+    hwaddr hash[2];    /* Pagetable hash values     */
+    target_ulong ptem;             /* Virtual segment ID | API  */
+    int key;                       /* Access key                */
+    int nx;                        /* Non-execute area          */
+};
+
 #define PTE_PTEM_MASK 0x7FFFFFBF
 #define PTE_CHECK_MASK (TARGET_PAGE_MASK | 0x7B)
 
@@ -162,7 +172,7 @@ static void hash32_bat_601_size_prot(CPUPPCState *env, 
target_ulong *blp,
     *protp = prot;
 }
 
-static int ppc_hash32_get_bat(CPUPPCState *env, mmu_ctx_t *ctx,
+static int ppc_hash32_get_bat(CPUPPCState *env, struct mmu_ctx_hash32 *ctx,
                               target_ulong virtual, int rw, int type)
 {
     target_ulong *BATlt, *BATut, *BATu, *BATl;
@@ -244,7 +254,7 @@ static inline int pte_is_valid_hash32(target_ulong pte0)
     return pte0 & 0x80000000 ? 1 : 0;
 }
 
-static int pte_check_hash32(mmu_ctx_t *ctx, target_ulong pte0,
+static int pte_check_hash32(struct mmu_ctx_hash32 *ctx, target_ulong pte0,
                             target_ulong pte1, int h, int rw, int type)
 {
     target_ulong ptem, mmask;
@@ -286,7 +296,7 @@ static int pte_check_hash32(mmu_ctx_t *ctx, target_ulong 
pte0,
     return ret;
 }
 
-static int ppc_hash32_pte_update_flags(mmu_ctx_t *ctx, target_ulong *pte1p,
+static int ppc_hash32_pte_update_flags(struct mmu_ctx_hash32 *ctx, 
target_ulong *pte1p,
                                        int ret, int rw)
 {
     int store = 0;
@@ -317,7 +327,7 @@ hwaddr get_pteg_offset32(CPUPPCState *env, hwaddr hash)
 }
 
 /* PTE table lookup */
-static int find_pte32(CPUPPCState *env, mmu_ctx_t *ctx, int h,
+static int find_pte32(CPUPPCState *env, struct mmu_ctx_hash32 *ctx, int h,
                       int rw, int type, int target_page_bits)
 {
     hwaddr pteg_off;
@@ -390,7 +400,7 @@ static int find_pte32(CPUPPCState *env, mmu_ctx_t *ctx, int 
h,
     return ret;
 }
 
-static int get_segment32(CPUPPCState *env, mmu_ctx_t *ctx,
+static int get_segment32(CPUPPCState *env, struct mmu_ctx_hash32 *ctx,
                          target_ulong eaddr, int rw, int type)
 {
     hwaddr hash;
@@ -535,7 +545,7 @@ static int get_segment32(CPUPPCState *env, mmu_ctx_t *ctx,
     return ret;
 }
 
-static int ppc_hash32_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
+static int ppc_hash32_get_physical_address(CPUPPCState *env, struct 
mmu_ctx_hash32 *ctx,
                                            target_ulong eaddr, int rw,
                                            int access_type)
 {
@@ -563,7 +573,7 @@ static int ppc_hash32_get_physical_address(CPUPPCState 
*env, mmu_ctx_t *ctx,
 
 hwaddr ppc_hash32_get_phys_page_debug(CPUPPCState *env, target_ulong addr)
 {
-    mmu_ctx_t ctx;
+    struct mmu_ctx_hash32 ctx;
 
     if (unlikely(ppc_hash32_get_physical_address(env, &ctx, addr, 0, 
ACCESS_INT)
                  != 0)) {
@@ -576,7 +586,7 @@ hwaddr ppc_hash32_get_phys_page_debug(CPUPPCState *env, 
target_ulong addr)
 int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
                                 int mmu_idx)
 {
-    mmu_ctx_t ctx;
+    struct mmu_ctx_hash32 ctx;
     int access_type;
     int ret = 0;
 
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 7134616..3008be8 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -40,6 +40,16 @@
 #  define LOG_SLB(...) do { } while (0)
 #endif
 
+struct mmu_ctx_hash64 {
+    hwaddr raddr;      /* Real address              */
+    hwaddr eaddr;      /* Effective address         */
+    int prot;                      /* Protection bits           */
+    hwaddr hash[2];    /* Pagetable hash values     */
+    target_ulong ptem;             /* Virtual segment ID | API  */
+    int key;                       /* Access key                */
+    int nx;                        /* Non-execute area          */
+};
+
 /*
  * SLB handling
  */
@@ -299,7 +309,7 @@ static inline int pte64_is_valid(target_ulong pte0)
     return pte0 & 0x0000000000000001ULL ? 1 : 0;
 }
 
-static int pte64_check(mmu_ctx_t *ctx, target_ulong pte0,
+static int pte64_check(struct mmu_ctx_hash64 *ctx, target_ulong pte0,
                        target_ulong pte1, int h, int rw, int type)
 {
     target_ulong ptem, mmask;
@@ -343,7 +353,8 @@ static int pte64_check(mmu_ctx_t *ctx, target_ulong pte0,
     return ret;
 }
 
-static int ppc_hash64_pte_update_flags(mmu_ctx_t *ctx, target_ulong *pte1p,
+static int ppc_hash64_pte_update_flags(struct mmu_ctx_hash64 *ctx,
+                                       target_ulong *pte1p,
                                        int ret, int rw)
 {
     int store = 0;
@@ -369,7 +380,7 @@ static int ppc_hash64_pte_update_flags(mmu_ctx_t *ctx, 
target_ulong *pte1p,
 }
 
 /* PTE table lookup */
-static int find_pte64(CPUPPCState *env, mmu_ctx_t *ctx, int h,
+static int find_pte64(CPUPPCState *env, struct mmu_ctx_hash64 *ctx, int h,
                       int rw, int type, int target_page_bits)
 {
     hwaddr pteg_off;
@@ -443,7 +454,7 @@ static int find_pte64(CPUPPCState *env, mmu_ctx_t *ctx, int 
h,
     return ret;
 }
 
-static int get_segment64(CPUPPCState *env, mmu_ctx_t *ctx,
+static int get_segment64(CPUPPCState *env, struct mmu_ctx_hash64 *ctx,
                          target_ulong eaddr, int rw, int type)
 {
     hwaddr hash;
@@ -529,7 +540,8 @@ static int get_segment64(CPUPPCState *env, mmu_ctx_t *ctx,
     return ret;
 }
 
-static int ppc_hash64_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
+static int ppc_hash64_get_physical_address(CPUPPCState *env,
+                                           struct mmu_ctx_hash64 *ctx,
                                            target_ulong eaddr, int rw,
                                            int access_type)
 {
@@ -547,7 +559,7 @@ static int ppc_hash64_get_physical_address(CPUPPCState 
*env, mmu_ctx_t *ctx,
 
 hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr)
 {
-    mmu_ctx_t ctx;
+    struct mmu_ctx_hash64 ctx;
 
     if (unlikely(ppc_hash64_get_physical_address(env, &ctx, addr, 0, 
ACCESS_INT)
                  != 0)) {
@@ -560,7 +572,7 @@ hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, 
target_ulong addr)
 int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
                                 int mmu_idx)
 {
-    mmu_ctx_t ctx;
+    struct mmu_ctx_hash64 ctx;
     int access_type;
     int ret = 0;
 
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 9471d59..c780ce1 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -77,6 +77,19 @@ int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong 
address, int rw,
 }
 
 #else
+
+/* Context used internally during MMU translations */
+typedef struct mmu_ctx_t mmu_ctx_t;
+struct mmu_ctx_t {
+    hwaddr raddr;      /* Real address              */
+    hwaddr eaddr;      /* Effective address         */
+    int prot;                      /* Protection bits           */
+    hwaddr hash[2];    /* Pagetable hash values     */
+    target_ulong ptem;             /* Virtual segment ID | API  */
+    int key;                       /* Access key                */
+    int nx;                        /* Non-execute area          */
+};
+
 /* Common routines used by software and hardware TLBs emulation */
 static inline int pte_is_valid(target_ulong pte0)
 {
-- 
1.7.10.4