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Re: Masking all interrupts in TCG mode


From: Arnabjyoti Kalita
Subject: Re: Masking all interrupts in TCG mode
Date: Sun, 4 Oct 2020 11:50:42 +0530

Yes, I think some problems when migrating from KVM->TCG are expected. I keep getting page faults in TCG when it tries to handle local APIC timer interrupts, which it probably doesn't understand. But that will be a different question to be asked here.

Thanks for all the help, Peter.

Arnab

On Fri, Oct 2, 2020 at 11:39 PM Peter Maydell <peter.maydell@linaro.org> wrote:
On Fri, 2 Oct 2020 at 17:50, Arnabjyoti Kalita
<akalita@cs.stonybrook.edu> wrote:
> What I can understand is that when we restore the VM State, the same interrupt state will be restored which was before we did a savevm. And then these interrupts will be executed appropriately.
>
> If there is an interrupt at the start of restore, then the interrupt will be executed first before the process of executing and finding the TB starts, based on the below logic. Am I correct ?
>
> while (!cpu_has_exception()) {
>     while (!cpu_has_interrupt()) {
>         tb = tb_find()
>         ....
>     }
> }

Yes, the interrupt will probably be the first thing to happen.
(If the VM save/restore had not happened, it would have been
the next thing to happen in the original execution.)

> Is it possible that the same interrupt could have different numbers
> in the KVM mode and in TCG mode? Like say, an interrupt is 0x15 in
> KVM, but is 0x75 in TCG.

I don't think that should happen. However, I'm not sure whether
the x86 guest code supports migration from KVM to TCG (I know that
it doesn't work for Arm guest code). KVM->KVM and TCG->TCG should
definitely both work.

thanks
-- PMM

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