Part of FEAT_AFP is the new control bit FPCR.FIZ. This bit affects
flushing of single and double precision denormal inputs to zero for
AArch64 floating point instructions. (For half-precision, the
existing FPCR.FZ16 control remains the only one.)
FPCR.FIZ differs from FPCR.FZ in that if we flush an input denormal
only because of FPCR.FIZ then we should *not* set the cumulative
exception bit FPSR.IDC.
FEAT_AFP also defines that in AArch64 the existing FPCR.FZ only
applies when FPCR.AH is 0.
We can implement this by setting the "flush inputs to zero" state
appropriately when FPCR is written, and by not reflecting the
float_flag_input_denormal status flag into FPSR reads when it is the
result only of FPSR.FIZ.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/vfp_helper.c | 58 ++++++++++++++++++++++++++++++++++-------
1 file changed, 48 insertions(+), 10 deletions(-)
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index 8c79ab4fc8a..5a0b389f7a3 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -61,19 +61,29 @@ static inline uint32_t vfp_exceptbits_from_host(int
host_bits)
static uint32_t vfp_get_fpsr_from_host(CPUARMState *env)
{
- uint32_t i = 0;
+ uint32_t a32_flags = 0, a64_flags = 0;
- i |= get_float_exception_flags(&env->vfp.fp_status_a32);
- i |= get_float_exception_flags(&env->vfp.fp_status_a64);
- i |= get_float_exception_flags(&env->vfp.standard_fp_status);
+ a32_flags |= get_float_exception_flags(&env->vfp.fp_status_a32);
+ a32_flags |= get_float_exception_flags(&env->vfp.standard_fp_status);
/* FZ16 does not generate an input denormal exception. */
- i |= (get_float_exception_flags(&env->vfp.fp_status_f16_a32)
+ a32_flags |= (get_float_exception_flags(&env->vfp.fp_status_f16_a32)
& ~float_flag_input_denormal_flushed);
- i |= (get_float_exception_flags(&env->vfp.fp_status_f16_a64)
+ a32_flags |= (get_float_exception_flags(&env->vfp.standard_fp_status_f16)
& ~float_flag_input_denormal_flushed);
- i |= (get_float_exception_flags(&env->vfp.standard_fp_status_f16)
+
+ a64_flags |= get_float_exception_flags(&env->vfp.fp_status_a64);
+ a64_flags |= (get_float_exception_flags(&env->vfp.fp_status_f16_a64)
& ~float_flag_input_denormal_flushed);
- return vfp_exceptbits_from_host(i);
+ /*
+ * Flushing an input denormal only because FPCR.FIZ == 1 does
+ * not set FPSR.IDC. So squash it unless (FPCR.AH == 0 && FPCR.FZ == 1).
+ * We only do this for the a64 flags because FIZ has no effect
+ * on AArch32 even if it is set.
+ */
+ if ((env->vfp.fpcr & (FPCR_FZ | FPCR_AH)) != FPCR_FZ) {
+ a64_flags &= ~float_flag_input_denormal_flushed;
+ }