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[PULL 24/48] intel_iommu: Introduce a property to control FS1GP cap bit
From: |
Michael S. Tsirkin |
Subject: |
[PULL 24/48] intel_iommu: Introduce a property to control FS1GP cap bit setting |
Date: |
Wed, 15 Jan 2025 13:09:43 -0500 |
From: Zhenzhong Duan <zhenzhong.duan@intel.com>
This gives user flexibility to turn off FS1GP for debug purpose.
It is also useful for future nesting feature. When host IOMMU doesn't
support FS1GP but vIOMMU does, nested page table on host side works
after turning FS1GP off in vIOMMU.
This property has no effect when vIOMMU is in legacy mode or x-flts=off
in scalable modme.
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>
Reviewed-by: Yi Liu <yi.l.liu@intel.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20241212083757.605022-20-zhenzhong.duan@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/i386/intel_iommu.h | 1 +
hw/i386/intel_iommu.c | 5 ++++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index 72428fefa4..9e92bffd5a 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -307,6 +307,7 @@ struct IntelIOMMUState {
bool dma_drain; /* Whether DMA r/w draining enabled */
bool dma_translation; /* Whether DMA translation supported */
bool pasid; /* Whether to support PASID */
+ bool fs1gp; /* First Stage 1-GByte Page Support */
/* Transient Mapping, Reserved(0) since VTD spec revision 3.2 */
bool stale_tm;
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 0111186f7a..f366c223d0 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -3834,6 +3834,7 @@ static const Property vtd_properties[] = {
DEFINE_PROP_BOOL("dma-drain", IntelIOMMUState, dma_drain, true),
DEFINE_PROP_BOOL("dma-translation", IntelIOMMUState, dma_translation,
true),
DEFINE_PROP_BOOL("stale-tm", IntelIOMMUState, stale_tm, false),
+ DEFINE_PROP_BOOL("fs1gp", IntelIOMMUState, fs1gp, true),
};
/* Read IRTE entry with specific index */
@@ -4561,7 +4562,9 @@ static void vtd_cap_init(IntelIOMMUState *s)
/* TODO: read cap/ecap from host to decide which cap to be exposed. */
if (s->flts) {
s->ecap |= VTD_ECAP_SMTS | VTD_ECAP_FLTS;
- s->cap |= VTD_CAP_FS1GP;
+ if (s->fs1gp) {
+ s->cap |= VTD_CAP_FS1GP;
+ }
} else if (s->scalable_mode) {
s->ecap |= VTD_ECAP_SMTS | VTD_ECAP_SRS | VTD_ECAP_SLTS;
}
--
MST
- [PULL 13/48] intel_iommu: Check stage-1 translation result with interrupt range, (continued)
- [PULL 13/48] intel_iommu: Check stage-1 translation result with interrupt range, Michael S. Tsirkin, 2025/01/15
- [PULL 20/48] tests/acpi: q35: allow DMAR acpi table changes, Michael S. Tsirkin, 2025/01/15
- [PULL 23/48] intel_iommu: Introduce a property x-flts for stage-1 translation, Michael S. Tsirkin, 2025/01/15
- [PULL 29/48] acpi/ghes: simplify the per-arch caller to build HEST table, Michael S. Tsirkin, 2025/01/15
- [PULL 31/48] acpi/ghes: Fix acpi_ghes_record_errors() argument, Michael S. Tsirkin, 2025/01/15
- [PULL 26/48] pci/msix: Fix msix pba read vector poll end calculation, Michael S. Tsirkin, 2025/01/15
- [PULL 27/48] acpi/ghes: get rid of ACPI_HEST_SRC_ID_RESERVED, Michael S. Tsirkin, 2025/01/15
- [PULL 34/48] acpi/ghes: don't check if physical_address is not zero, Michael S. Tsirkin, 2025/01/15
- [PULL 17/48] intel_iommu: Add an internal API to find an address space with PASID, Michael S. Tsirkin, 2025/01/15
- [PULL 19/48] intel_iommu: piotlb invalidation should notify unmap, Michael S. Tsirkin, 2025/01/15
- [PULL 24/48] intel_iommu: Introduce a property to control FS1GP cap bit setting,
Michael S. Tsirkin <=
- [PULL 14/48] intel_iommu: Set accessed and dirty bits during stage-1 translation, Michael S. Tsirkin, 2025/01/15
- [PULL 18/48] intel_iommu: Add support for PASID-based device IOTLB invalidation, Michael S. Tsirkin, 2025/01/15
- [PULL 33/48] acpi/ghes: Change the type for source_id, Michael S. Tsirkin, 2025/01/15
- [PULL 32/48] acpi/ghes: Remove a duplicated out of bounds check, Michael S. Tsirkin, 2025/01/15
- [PULL 15/48] intel_iommu: Flush stage-1 cache in iotlb invalidation, Michael S. Tsirkin, 2025/01/15
- [PULL 16/48] intel_iommu: Process PASID-based iotlb invalidation, Michael S. Tsirkin, 2025/01/15
- [PULL 40/48] acpi/ghes: move offset calculus to a separate function, Michael S. Tsirkin, 2025/01/15
- [PULL 21/48] intel_iommu: Set default aw_bits to 48 starting from QEMU 9.2, Michael S. Tsirkin, 2025/01/15
- [PULL 22/48] tests/acpi: q35: Update host address width in DMAR, Michael S. Tsirkin, 2025/01/15
- [PULL 41/48] acpi/ghes: Change ghes fill logic to work with only one source, Michael S. Tsirkin, 2025/01/15