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Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property


From: Peter Maydell
Subject: Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property
Date: Tue, 7 Jan 2025 22:36:39 +0000

On Tue, 7 Jan 2025 at 17:55, Cédric Le Goater <clg@kaod.org> wrote:
>
> Hello,
>
> > I would not recommend using qemu_irq_invert() in new code.
> >
> > I guess in an ideal world we'd implement a QOM object
> > that encapsulated the the "not gate" logic, similar to
> > TYPE_OR_IRQ. (Though for TYPE_OR_IRQ we made the mistake
> > of making it inherit from TYPE_DEVICE, not TYPE_SYSBUS_DEVICE,
> > so it doesn't get reset properly on system reset and so
> > the "what happens to the output on reset" is still not
> > really correct.)
>
> I see how this would work with TYPE_PL181 model but I don't
> understand how this could work with TYPE_SYSBUS_SDHCI since
> we don't have a gpio line to invert the level. Am I missing
> something ?

You have a gpio line, i.e. a qemu_irq, because you're passing
it to qemu_irq_invert(), and you could instead connect it into
a hypothetical TYPE_NOT_IRQ device. qemu_irq are GPIO lines,
the type just has an odd name for historical reasons.

-- PMM



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