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[PATCH 60/73] tcg: Change have_vec to has_type in tcg_op_supported
From: |
Richard Henderson |
Subject: |
[PATCH 60/73] tcg: Change have_vec to has_type in tcg_op_supported |
Date: |
Thu, 2 Jan 2025 10:06:40 -0800 |
Test each vector type, not just lumping them all together.
Add tests for I32 (always true) and I64 (64-bit hosts).
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg.c | 66 ++++++++++++++++++++++++++++++++++++-------------------
1 file changed, 43 insertions(+), 23 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index c604785d39..3d641d6d00 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -2136,8 +2136,28 @@ TCGTemp *tcgv_i32_temp(TCGv_i32 v)
*/
bool tcg_op_supported(TCGOpcode op, TCGType type)
{
- const bool have_vec
- = TCG_TARGET_HAS_v64 | TCG_TARGET_HAS_v128 | TCG_TARGET_HAS_v256;
+ bool has_type;
+
+ switch (type) {
+ case TCG_TYPE_I32:
+ has_type = true;
+ break;
+ case TCG_TYPE_I64:
+ has_type = TCG_TARGET_REG_BITS == 64;
+ break;
+ case TCG_TYPE_V64:
+ has_type = TCG_TARGET_HAS_v64;
+ break;
+ case TCG_TYPE_V128:
+ has_type = TCG_TARGET_HAS_v128;
+ break;
+ case TCG_TYPE_V256:
+ has_type = TCG_TARGET_HAS_v256;
+ break;
+ default:
+ has_type = false;
+ break;
+ }
switch (op) {
case INDEX_op_discard:
@@ -2327,60 +2347,60 @@ bool tcg_op_supported(TCGOpcode op, TCGType type)
case INDEX_op_or_vec:
case INDEX_op_xor_vec:
case INDEX_op_cmp_vec:
- return have_vec;
+ return has_type;
case INDEX_op_dup2_vec:
- return have_vec && TCG_TARGET_REG_BITS == 32;
+ return has_type && TCG_TARGET_REG_BITS == 32;
case INDEX_op_not_vec:
- return have_vec && TCG_TARGET_HAS_not(type);
+ return has_type && TCG_TARGET_HAS_not(type);
case INDEX_op_neg_vec:
- return have_vec && TCG_TARGET_HAS_neg_vec;
+ return has_type && TCG_TARGET_HAS_neg_vec;
case INDEX_op_abs_vec:
- return have_vec && TCG_TARGET_HAS_abs_vec;
+ return has_type && TCG_TARGET_HAS_abs_vec;
case INDEX_op_andc_vec:
- return have_vec && TCG_TARGET_HAS_andc(type);
+ return has_type && TCG_TARGET_HAS_andc(type);
case INDEX_op_orc_vec:
- return have_vec && TCG_TARGET_HAS_orc(type);
+ return has_type && TCG_TARGET_HAS_orc(type);
case INDEX_op_nand_vec:
- return have_vec && TCG_TARGET_HAS_nand(type);
+ return has_type && TCG_TARGET_HAS_nand(type);
case INDEX_op_nor_vec:
- return have_vec && TCG_TARGET_HAS_nor(type);
+ return has_type && TCG_TARGET_HAS_nor(type);
case INDEX_op_eqv_vec:
- return have_vec && TCG_TARGET_HAS_eqv(type);
+ return has_type && TCG_TARGET_HAS_eqv(type);
case INDEX_op_mul_vec:
- return have_vec && TCG_TARGET_HAS_mul_vec;
+ return has_type && TCG_TARGET_HAS_mul_vec;
case INDEX_op_shli_vec:
case INDEX_op_shri_vec:
case INDEX_op_sari_vec:
- return have_vec && TCG_TARGET_HAS_shi_vec;
+ return has_type && TCG_TARGET_HAS_shi_vec;
case INDEX_op_shls_vec:
case INDEX_op_shrs_vec:
case INDEX_op_sars_vec:
- return have_vec && TCG_TARGET_HAS_shs_vec;
+ return has_type && TCG_TARGET_HAS_shs_vec;
case INDEX_op_shlv_vec:
case INDEX_op_shrv_vec:
case INDEX_op_sarv_vec:
- return have_vec && TCG_TARGET_HAS_shv_vec;
+ return has_type && TCG_TARGET_HAS_shv_vec;
case INDEX_op_rotli_vec:
- return have_vec && TCG_TARGET_HAS_roti_vec;
+ return has_type && TCG_TARGET_HAS_roti_vec;
case INDEX_op_rotls_vec:
- return have_vec && TCG_TARGET_HAS_rots_vec;
+ return has_type && TCG_TARGET_HAS_rots_vec;
case INDEX_op_rotlv_vec:
case INDEX_op_rotrv_vec:
- return have_vec && TCG_TARGET_HAS_rotv_vec;
+ return has_type && TCG_TARGET_HAS_rotv_vec;
case INDEX_op_ssadd_vec:
case INDEX_op_usadd_vec:
case INDEX_op_sssub_vec:
case INDEX_op_ussub_vec:
- return have_vec && TCG_TARGET_HAS_sat_vec;
+ return has_type && TCG_TARGET_HAS_sat_vec;
case INDEX_op_smin_vec:
case INDEX_op_umin_vec:
case INDEX_op_smax_vec:
case INDEX_op_umax_vec:
- return have_vec && TCG_TARGET_HAS_minmax_vec;
+ return has_type && TCG_TARGET_HAS_minmax_vec;
case INDEX_op_bitsel_vec:
- return have_vec && TCG_TARGET_HAS_bitsel_vec;
+ return has_type && TCG_TARGET_HAS_bitsel_vec;
case INDEX_op_cmpsel_vec:
- return have_vec && TCG_TARGET_HAS_cmpsel_vec;
+ return has_type && TCG_TARGET_HAS_cmpsel_vec;
default:
tcg_debug_assert(op > INDEX_op_last_generic && op < NB_OPS);
--
2.43.0
- [PATCH 70/73] tcg: Merge extract2 operations, (continued)
- [PATCH 70/73] tcg: Merge extract2 operations, Richard Henderson, 2025/01/02
- [PATCH 44/73] tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64}, Richard Henderson, 2025/01/02
- [PATCH 53/73] tcg: Use C_NotImplemented in tcg_target_op_def, Richard Henderson, 2025/01/02
- [PATCH 43/73] tcg/tci: Remove assertions for deposit and extract, Richard Henderson, 2025/01/02
- [PATCH 66/73] tcg: Merge brcond, setcond, negsetcond, movcond operations, Richard Henderson, 2025/01/02
- [PATCH 45/73] tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64}, Richard Henderson, 2025/01/02
- [PATCH 46/73] tcg: Merge TCG_TARGET_HAS_extract2_{i32,i64}, Richard Henderson, 2025/01/02
- [PATCH 51/73] tcg: Constify tcg_op_defs, Richard Henderson, 2025/01/02
- [PATCH 56/73] tcg: Remove INDEX_op_qemu_st8_*_i32, Richard Henderson, 2025/01/02
- [PATCH 60/73] tcg: Change have_vec to has_type in tcg_op_supported,
Richard Henderson <=
- [PATCH 64/73] tcg: Merge integer add2, sub2 operations, Richard Henderson, 2025/01/02
- [PATCH 62/73] tcg: Merge integer logical operations, Richard Henderson, 2025/01/02
- [PATCH 71/73] tcg: Merge host integer load/store operations, Richard Henderson, 2025/01/02
- [PATCH 49/73] tcg: Reorg process_op_defs, Richard Henderson, 2025/01/02
- [PATCH 73/73] tcg: Merge clz, ctz, ctpop operations, Richard Henderson, 2025/01/02
- [PATCH 61/73] tcg: Merge INDEX_op_mov_{i32,i64}, Richard Henderson, 2025/01/02
- [PATCH 63/73] tcg: Merge integer add, sub, neg operations, Richard Henderson, 2025/01/02