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[PULL 07/18] target/hppa: Fix EIRR, EIEM versus icount
From: |
Richard Henderson |
Subject: |
[PULL 07/18] target/hppa: Fix EIRR, EIEM versus icount |
Date: |
Fri, 29 Mar 2024 12:31:00 -1000 |
Call translator_io_start before write to EIRR.
Move evaluation of EIRR vs EIEM to hppa_cpu_exec_interrupt.
Exit TB after write to EIEM, but otherwise use a straight store.
Reviewed-by: Helge Deller <deller@gmx.de>
Tested-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/helper.h | 1 -
target/hppa/int_helper.c | 14 ++++----------
target/hppa/translate.c | 10 +++++++---
3 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/target/hppa/helper.h b/target/hppa/helper.h
index 1bdbcd8f98..8fd7ba65d8 100644
--- a/target/hppa/helper.h
+++ b/target/hppa/helper.h
@@ -91,7 +91,6 @@ DEF_HELPER_1(rfi, void, env)
DEF_HELPER_1(rfi_r, void, env)
DEF_HELPER_FLAGS_2(write_interval_timer, TCG_CALL_NO_RWG, void, env, tl)
DEF_HELPER_FLAGS_2(write_eirr, TCG_CALL_NO_RWG, void, env, tl)
-DEF_HELPER_FLAGS_2(write_eiem, TCG_CALL_NO_RWG, void, env, tl)
DEF_HELPER_FLAGS_2(swap_system_mask, TCG_CALL_NO_RWG, tl, env, tl)
DEF_HELPER_FLAGS_3(itlba_pa11, TCG_CALL_NO_RWG, void, env, tl, tl)
DEF_HELPER_FLAGS_3(itlbp_pa11, TCG_CALL_NO_RWG, void, env, tl, tl)
diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c
index efe638b36e..90437a92cd 100644
--- a/target/hppa/int_helper.c
+++ b/target/hppa/int_helper.c
@@ -28,7 +28,7 @@
static void eval_interrupt(HPPACPU *cpu)
{
CPUState *cs = CPU(cpu);
- if (cpu->env.cr[CR_EIRR] & cpu->env.cr[CR_EIEM]) {
+ if (cpu->env.cr[CR_EIRR]) {
cpu_interrupt(cs, CPU_INTERRUPT_HARD);
} else {
cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
@@ -89,14 +89,6 @@ void HELPER(write_eirr)(CPUHPPAState *env, target_ulong val)
bql_unlock();
}
-void HELPER(write_eiem)(CPUHPPAState *env, target_ulong val)
-{
- env->cr[CR_EIEM] = val;
- bql_lock();
- eval_interrupt(env_archcpu(env));
- bql_unlock();
-}
-
void hppa_cpu_do_interrupt(CPUState *cs)
{
HPPACPU *cpu = HPPA_CPU(cs);
@@ -280,7 +272,9 @@ bool hppa_cpu_exec_interrupt(CPUState *cs, int
interrupt_request)
}
/* If interrupts are requested and enabled, raise them. */
- if ((env->psw & PSW_I) && (interrupt_request & CPU_INTERRUPT_HARD)) {
+ if ((interrupt_request & CPU_INTERRUPT_HARD)
+ && (env->psw & PSW_I)
+ && (env->cr[CR_EIRR] & env->cr[CR_EIEM])) {
cs->exception_index = EXCP_EXT_INTERRUPT;
hppa_cpu_do_interrupt(cs);
return true;
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 5b8c1b06c3..46b2d6508d 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2166,10 +2166,10 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
gen_helper_write_interval_timer(tcg_env, reg);
break;
case CR_EIRR:
+ /* Helper modifies interrupt lines and is therefore IO. */
+ translator_io_start(&ctx->base);
gen_helper_write_eirr(tcg_env, reg);
- break;
- case CR_EIEM:
- gen_helper_write_eiem(tcg_env, reg);
+ /* Exit to re-evaluate interrupts in the main loop. */
ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT;
break;
@@ -2195,6 +2195,10 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
#endif
break;
+ case CR_EIEM:
+ /* Exit to re-evaluate interrupts in the main loop. */
+ ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT;
+ /* FALLTHRU */
default:
tcg_gen_st_i64(reg, tcg_env, offsetof(CPUHPPAState, cr[ctl]));
break;
--
2.34.1
- [PULL 00/18] target/hppa patch queue, Richard Henderson, 2024/03/29
- [PULL 01/18] target/hppa: Fix BE,L set of sr0, Richard Henderson, 2024/03/29
- [PULL 05/18] target/hppa: Mark interval timer write as io, Richard Henderson, 2024/03/29
- [PULL 02/18] target/hppa: Fix B,GATE for wide mode, Richard Henderson, 2024/03/29
- [PULL 11/18] target/hppa: Fix unit carry conditions, Richard Henderson, 2024/03/29
- [PULL 03/18] target/hppa: Handle unit conditions for wide mode, Richard Henderson, 2024/03/29
- [PULL 08/18] target/hppa: Use gva_offset_mask() everywhere, Richard Henderson, 2024/03/29
- [PULL 10/18] target/hppa: Optimize UADDCM with no condition, Richard Henderson, 2024/03/29
- [PULL 06/18] target/hppa: Tidy read of interval timer, Richard Henderson, 2024/03/29
- [PULL 16/18] target/hppa: Move diag argument handling to decodetree, Richard Henderson, 2024/03/29
- [PULL 07/18] target/hppa: Fix EIRR, EIEM versus icount,
Richard Henderson <=
- [PULL 04/18] target/hppa: Fix ADD/SUB trap on overflow for narrow mode, Richard Henderson, 2024/03/29
- [PULL 09/18] target/hppa: Fix DCOR reconstruction of carry bits, Richard Henderson, 2024/03/29
- [PULL 12/18] target/hppa: Squash d for pa1.x during decode, Richard Henderson, 2024/03/29
- [PULL 13/18] target/hppa: Replace c with uv in do_cond, Richard Henderson, 2024/03/29
- [PULL 18/18] target/hppa: Clear psw_n for BE on use_nullify_skip path, Richard Henderson, 2024/03/29
- [PULL 17/18] target/hppa: Add diag instructions to set/restore shadow registers, Richard Henderson, 2024/03/29
- [PULL 14/18] target/hppa: Fix overflow computation for shladd, Richard Henderson, 2024/03/29
- [PULL 15/18] target/hppa: Generate getshadowregs inline, Richard Henderson, 2024/03/29