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[PULL 08/18] target/hppa: Use gva_offset_mask() everywhere
From: |
Richard Henderson |
Subject: |
[PULL 08/18] target/hppa: Use gva_offset_mask() everywhere |
Date: |
Fri, 29 Mar 2024 12:31:01 -1000 |
From: Sven Schnelle <svens@stackframe.org>
Move it to cpu.h, so it can also be used in hppa_form_gva_psw().
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240324080945.991100-2-svens@stackframe.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/cpu.h | 10 ++++++++--
target/hppa/translate.c | 12 +++---------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index a92dc352cb..a072d0bb63 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -285,14 +285,20 @@ void hppa_translate_init(void);
#define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
+static inline uint64_t gva_offset_mask(target_ulong psw)
+{
+ return (psw & PSW_W
+ ? MAKE_64BIT_MASK(0, 62)
+ : MAKE_64BIT_MASK(0, 32));
+}
+
static inline target_ulong hppa_form_gva_psw(target_ulong psw, uint64_t spc,
target_ulong off)
{
#ifdef CONFIG_USER_ONLY
return off;
#else
- off &= psw & PSW_W ? MAKE_64BIT_MASK(0, 62) : MAKE_64BIT_MASK(0, 32);
- return spc | off;
+ return spc | (off & gva_offset_mask(psw));
#endif
}
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 46b2d6508d..e041310207 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -586,17 +586,10 @@ static bool nullify_end(DisasContext *ctx)
return true;
}
-static uint64_t gva_offset_mask(DisasContext *ctx)
-{
- return (ctx->tb_flags & PSW_W
- ? MAKE_64BIT_MASK(0, 62)
- : MAKE_64BIT_MASK(0, 32));
-}
-
static void copy_iaoq_entry(DisasContext *ctx, TCGv_i64 dest,
uint64_t ival, TCGv_i64 vval)
{
- uint64_t mask = gva_offset_mask(ctx);
+ uint64_t mask = gva_offset_mask(ctx->tb_flags);
if (ival != -1) {
tcg_gen_movi_i64(dest, ival & mask);
@@ -1430,7 +1423,8 @@ static void form_gva(DisasContext *ctx, TCGv_i64 *pgva,
TCGv_i64 *pofs,
*pofs = ofs;
*pgva = addr = tcg_temp_new_i64();
- tcg_gen_andi_i64(addr, modify <= 0 ? ofs : base, gva_offset_mask(ctx));
+ tcg_gen_andi_i64(addr, modify <= 0 ? ofs : base,
+ gva_offset_mask(ctx->tb_flags));
#ifndef CONFIG_USER_ONLY
if (!is_phys) {
tcg_gen_or_i64(addr, addr, space_select(ctx, sp, base));
--
2.34.1
- [PULL 00/18] target/hppa patch queue, Richard Henderson, 2024/03/29
- [PULL 01/18] target/hppa: Fix BE,L set of sr0, Richard Henderson, 2024/03/29
- [PULL 05/18] target/hppa: Mark interval timer write as io, Richard Henderson, 2024/03/29
- [PULL 02/18] target/hppa: Fix B,GATE for wide mode, Richard Henderson, 2024/03/29
- [PULL 11/18] target/hppa: Fix unit carry conditions, Richard Henderson, 2024/03/29
- [PULL 03/18] target/hppa: Handle unit conditions for wide mode, Richard Henderson, 2024/03/29
- [PULL 08/18] target/hppa: Use gva_offset_mask() everywhere,
Richard Henderson <=
- [PULL 10/18] target/hppa: Optimize UADDCM with no condition, Richard Henderson, 2024/03/29
- [PULL 06/18] target/hppa: Tidy read of interval timer, Richard Henderson, 2024/03/29
- [PULL 16/18] target/hppa: Move diag argument handling to decodetree, Richard Henderson, 2024/03/29
- [PULL 07/18] target/hppa: Fix EIRR, EIEM versus icount, Richard Henderson, 2024/03/29
- [PULL 04/18] target/hppa: Fix ADD/SUB trap on overflow for narrow mode, Richard Henderson, 2024/03/29
- [PULL 09/18] target/hppa: Fix DCOR reconstruction of carry bits, Richard Henderson, 2024/03/29
- [PULL 12/18] target/hppa: Squash d for pa1.x during decode, Richard Henderson, 2024/03/29
- [PULL 13/18] target/hppa: Replace c with uv in do_cond, Richard Henderson, 2024/03/29
- [PULL 18/18] target/hppa: Clear psw_n for BE on use_nullify_skip path, Richard Henderson, 2024/03/29
- [PULL 17/18] target/hppa: Add diag instructions to set/restore shadow registers, Richard Henderson, 2024/03/29