Re: [PATCH 2/4] target/riscv: Add right functions to set agnostic elements

[Huang Tao]

I will rewrite the patch, and send a new version soon.

Thanks,

Huang Tao

On 2024/3/20 07:32, Richard Henderson wrote:
> On 3/19/24 11:57, Daniel Henrique Barboza wrote:
> > This seems correct but a bit over complicated at first glance. I 
> > wonder if we have
> > something simpler already done somewhere.
> >
> > Richard, does ARM (or any other arch) do anything of the sort? Aside 
> > from more trivial
> > byte swaps using bswap64() I didn't find anything similar.
>
> No, nothing quite like.
>
> > We recently posted a big endian related fix here:
> >
> > [PATCH for 9.0 v15 03/10] target/riscv/vector_helper.c: fix 'vmvr_v' 
> > memcpy endianess
> >
> > But not sure how to apply it here.
>
> It's almost exactly the same, only with memset instead of memcpy.
>
>     if (HOST_BIG_ENDIAN && idx % 8 != 0) {
>         uint32_t j = ROUND_UP(idx, 8);
>         memset(vd + H(j - 1), -1, j - idx);
>         idx = j;
>     }
>     memset(vd + idx, -1, tot - idx);
>
>
> I'll note that you don't need to change the api of vext_set_elems_1s 
> -- so most of these patches are not required.
>
>
> r~