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[PULL 14/22] hw/adc/zynq-xadc: Use qemu_irq typedef
From: |
Peter Maydell |
Subject: |
[PULL 14/22] hw/adc/zynq-xadc: Use qemu_irq typedef |
Date: |
Thu, 19 May 2022 18:36:43 +0100 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Except hw/core/irq.c which implements the forward-declared opaque
qemu_irq structure, hw/adc/zynq-xadc.{c,h} are the only files not
using the typedef. Fix this single exception.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Message-id: 20220509202035.50335-1-philippe.mathieu.daude@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/adc/zynq-xadc.h | 3 +--
hw/adc/zynq-xadc.c | 4 ++--
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/include/hw/adc/zynq-xadc.h b/include/hw/adc/zynq-xadc.h
index 2017b7a8037..c10cc4c379c 100644
--- a/include/hw/adc/zynq-xadc.h
+++ b/include/hw/adc/zynq-xadc.h
@@ -39,8 +39,7 @@ struct ZynqXADCState {
uint16_t xadc_dfifo[ZYNQ_XADC_FIFO_DEPTH];
uint16_t xadc_dfifo_entries;
- struct IRQState *qemu_irq;
-
+ qemu_irq irq;
};
#endif /* ZYNQ_XADC_H */
diff --git a/hw/adc/zynq-xadc.c b/hw/adc/zynq-xadc.c
index cfc7bab0651..032e19cbd0a 100644
--- a/hw/adc/zynq-xadc.c
+++ b/hw/adc/zynq-xadc.c
@@ -86,7 +86,7 @@ static void zynq_xadc_update_ints(ZynqXADCState *s)
s->regs[INT_STS] |= INT_DFIFO_GTH;
}
- qemu_set_irq(s->qemu_irq, !!(s->regs[INT_STS] & ~s->regs[INT_MASK]));
+ qemu_set_irq(s->irq, !!(s->regs[INT_STS] & ~s->regs[INT_MASK]));
}
static void zynq_xadc_reset(DeviceState *d)
@@ -262,7 +262,7 @@ static void zynq_xadc_init(Object *obj)
memory_region_init_io(&s->iomem, obj, &xadc_ops, s, "zynq-xadc",
ZYNQ_XADC_MMIO_SIZE);
sysbus_init_mmio(sbd, &s->iomem);
- sysbus_init_irq(sbd, &s->qemu_irq);
+ sysbus_init_irq(sbd, &s->irq);
}
static const VMStateDescription vmstate_zynq_xadc = {
--
2.25.1
- [PULL 01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits, (continued)
- [PULL 01/22] target/arm: Postpone interpretation of stage 2 descriptor attribute bits, Peter Maydell, 2022/05/19
- [PULL 05/22] target/arm: Implement FEAT_IDST, Peter Maydell, 2022/05/19
- [PULL 04/22] target/arm: Enable FEAT_S2FWB for -cpu max, Peter Maydell, 2022/05/19
- [PULL 07/22] hw/intc/arm_gicv3_cpuif: Handle CPUs that don't specify GICv3 parameters, Peter Maydell, 2022/05/19
- [PULL 09/22] hw/intc/arm_gicv3_kvm.c: Stop using GIC_MIN_BPR constant, Peter Maydell, 2022/05/19
- [PULL 10/22] hw/intc/arm_gicv3: Support configurable number of physical priority bits, Peter Maydell, 2022/05/19
- [PULL 06/22] target/arm: Drop unsupported_encoding() macro, Peter Maydell, 2022/05/19
- [PULL 02/22] target/arm: Factor out FWB=0 specific part of combine_cacheattrs(), Peter Maydell, 2022/05/19
- [PULL 12/22] hw/intc/arm_gicv3: Provide ich_num_aprs(), Peter Maydell, 2022/05/19
- [PULL 11/22] hw/intc/arm_gicv3: Use correct number of priority bits for the CPU, Peter Maydell, 2022/05/19
- [PULL 14/22] hw/adc/zynq-xadc: Use qemu_irq typedef,
Peter Maydell <=
- [PULL 15/22] target/arm/helper.c: Delete stray obsolete comment, Peter Maydell, 2022/05/19
- [PULL 13/22] Fix aarch64 debug register names., Peter Maydell, 2022/05/19
- [PULL 18/22] hw/arm/virt: Drop #size-cells and #address-cells from gpio-keys dtb node, Peter Maydell, 2022/05/19
- [PULL 19/22] ptimer: Rename PTIMER_POLICY_DEFAULT to PTIMER_POLICY_LEGACY, Peter Maydell, 2022/05/19
- [PULL 20/22] target/arm: Fix PAuth keys access checks for disabled SEL2, Peter Maydell, 2022/05/19
- [PULL 17/22] hw/arm/virt: Fix incorrect non-secure flash dtb node name, Peter Maydell, 2022/05/19
- [PULL 21/22] target/arm: Enable FEAT_HCX for -cpu max, Peter Maydell, 2022/05/19
- [PULL 16/22] target/arm: Make number of counters in PMCR follow the CPU, Peter Maydell, 2022/05/19
- [PULL 22/22] target/arm: Use FIELD definitions for CPACR, CPTR_ELx, Peter Maydell, 2022/05/19
- [PULL 08/22] hw/intc/arm_gicv3: report correct PRIbits field in ICV_CTLR_EL1, Peter Maydell, 2022/05/19