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Re: [PATCH 0/9] accel/tcg: Add tlb_flush interface for a range of pages
From: |
Peter Maydell |
Subject: |
Re: [PATCH 0/9] accel/tcg: Add tlb_flush interface for a range of pages |
Date: |
Tue, 25 May 2021 15:32:31 +0100 |
On Sun, 9 May 2021 at 16:20, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Hi Richard,
>
> I tried to make sense of the multiple changes in your patch
> https://www.mail-archive.com/qemu-devel@nongnu.org/msg805595.html
> by splitting it in multiple trivial changes. At least this way
> it is easier to me to follow / review what you did.
>
> The original patch description was:
>
> Add tlb_flush interface for a range of pages.
> Call these tlb_flush_range_by_mmuidx*.
> Rewrite the_flush_page_bits_by_mmuidx* to use the new
> functions, passing in TARGET_PAGE_SIZE for length.
>
> If you find it useful, fill free to take / respin / reorder this
> series, improving descriptions. Last patch certainly deserves a
> better description ;)
Thanks very much for splitting this patch up -- it made it
a lot easier to review. I've added the commit messages
Richard has sent, moved the last patch to earlier in the
series, and applied the whole lot to target-arm.next.
-- PMM
- [PATCH 7/9] accel/tcg: Rename tlb_flush_page_bits -> range]_by_mmuidx_async_0, (continued)
- Re: [PATCH 0/9] accel/tcg: Add tlb_flush interface for a range of pages,
Peter Maydell <=