[RFC PATCH 0/3] target/mips: Make the number of TLB entries a CPU property

[Philippe Mathieu-Daudé]

Yocto developers have expressed interest in running MIPS32
CPU with custom number of TLB:
https://lists.gnu.org/archive/html/qemu-devel/2020-10/msg03428.html

Help them by making the number of TLB entries a CPU property,
keeping our set of CPU definitions in sync with real hardware.

Please test/review,

Phil.

Philippe Mathieu-Daudé (3):
  target/mips: Make cpu_mips_realize_env() propagate Error
  target/mips: Store number of TLB entries in CPUMIPSState
  target/mips: Make the number of TLB entries a CPU property

 target/mips/cpu.h                |  1 +
 target/mips/internal.h           | 10 +++++++++-
 target/mips/cpu.c                | 12 ++++++++++--
 target/mips/translate.c          | 16 ++++++++++++++--
 target/mips/translate_init.c.inc |  2 +-
 5 files changed, 35 insertions(+), 6 deletions(-)

-- 
2.26.2