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[PULL 18/35] armsse: Define ARMSSEClass correctly
From: |
Peter Maydell |
Subject: |
[PULL 18/35] armsse: Define ARMSSEClass correctly |
Date: |
Fri, 28 Aug 2020 10:23:56 +0100 |
From: Eduardo Habkost <ehabkost@redhat.com>
TYPE_ARM_SSE is a TYPE_SYS_BUS_DEVICE subclass, but
ARMSSEClass::parent_class is declared as DeviceClass.
It never caused any problems by pure luck:
We were not setting class_size for TYPE_ARM_SSE, so class_size of
TYPE_SYS_BUS_DEVICE was being used (sizeof(SysBusDeviceClass)).
This made the system allocate enough memory for TYPE_ARM_SSE
devices even though ARMSSEClass was too small for a sysbus
device.
Additionally, the ARMSSEClass::info field ended up at the same
offset as SysBusDeviceClass::explicit_ofw_unit_address. This
would make sysbus_get_fw_dev_path() crash for the device.
Luckily, sysbus_get_fw_dev_path() never gets called for
TYPE_ARM_SSE devices, because qdev_get_fw_dev_path() is only used
by the boot device code, and TYPE_ARM_SSE devices don't appear at
the fw_boot_order list.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-id: 20200826181006.4097163-1-ehabkost@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/armsse.h | 2 +-
hw/arm/armsse.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index 84080c22993..b10173beabd 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -220,7 +220,7 @@ typedef struct ARMSSE {
typedef struct ARMSSEInfo ARMSSEInfo;
typedef struct ARMSSEClass {
- DeviceClass parent_class;
+ SysBusDeviceClass parent_class;
const ARMSSEInfo *info;
} ARMSSEClass;
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index dcbff9bd8f4..6381bbd94d6 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -1160,6 +1160,7 @@ static const TypeInfo armsse_info = {
.name = TYPE_ARMSSE,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(ARMSSE),
+ .class_size = sizeof(ARMSSEClass),
.instance_init = armsse_init,
.abstract = true,
.interfaces = (InterfaceInfo[]) {
--
2.20.1
- [PULL 08/35] target/arm: Fill in the WnR syndrome bit in mte_check_fail, (continued)
- [PULL 08/35] target/arm: Fill in the WnR syndrome bit in mte_check_fail, Peter Maydell, 2020/08/28
- [PULL 09/35] hw/sd/allwinner-sdhost: Use AddressSpace for DMA transfers, Peter Maydell, 2020/08/28
- [PULL 10/35] hw/net/allwinner-sun8i-emac: Use AddressSpace for DMA transfers, Peter Maydell, 2020/08/28
- [PULL 11/35] hw/arm/xilinx_zynq: Uninline cadence_uart_create(), Peter Maydell, 2020/08/28
- [PULL 13/35] hw/qdev-clock: Uninline qdev_connect_clock_in(), Peter Maydell, 2020/08/28
- [PULL 12/35] hw/arm/xilinx_zynq: Call qdev_connect_clock_in() before DeviceRealize, Peter Maydell, 2020/08/28
- [PULL 14/35] hw/qdev-clock: Avoid calling qdev_connect_clock_in after DeviceRealize, Peter Maydell, 2020/08/28
- [PULL 16/35] hw/misc/unimp: Display the value with width of the access size, Peter Maydell, 2020/08/28
- [PULL 15/35] hw/misc/unimp: Display value after offset, Peter Maydell, 2020/08/28
- [PULL 17/35] hw/misc/unimp: Display the offset with width of the region size, Peter Maydell, 2020/08/28
- [PULL 18/35] armsse: Define ARMSSEClass correctly,
Peter Maydell <=
- [PULL 19/35] qemu/int128: Add int128_lshift, Peter Maydell, 2020/08/28
- [PULL 21/35] target/arm: Split out gen_gvec_fn_zzz, do_zzz_fn, Peter Maydell, 2020/08/28
- [PULL 22/35] target/arm: Rearrange {sve,fp}_check_access assert, Peter Maydell, 2020/08/28
- [PULL 20/35] target/arm: Split out gen_gvec_fn_zz, Peter Maydell, 2020/08/28
- [PULL 23/35] target/arm: Merge do_vector2_p into do_mov_p, Peter Maydell, 2020/08/28
- [PULL 24/35] target/arm: Clean up 4-operand predicate expansion, Peter Maydell, 2020/08/28
- [PULL 26/35] target/arm: Split out gen_gvec_ool_zzzp, Peter Maydell, 2020/08/28
- [PULL 25/35] target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_pppp, Peter Maydell, 2020/08/28
- [PULL 28/35] target/arm: Split out gen_gvec_ool_zzp, Peter Maydell, 2020/08/28
- [PULL 27/35] target/arm: Merge helper_sve_clr_* and helper_sve_movz_*, Peter Maydell, 2020/08/28