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Re: [PATCH v3 09/20] cputlb: Replace switches in load/store_helper with
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH v3 09/20] cputlb: Replace switches in load/store_helper with callback |
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Date: |
Mon, 23 Sep 2019 11:18:04 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 |
On 9/23/19 8:52 AM, Richard Henderson wrote:
> On 9/23/19 3:02 AM, Paolo Bonzini wrote:
>> On 23/09/19 11:54, David Hildenbrand wrote:
>>> On 23.09.19 11:51, Paolo Bonzini wrote:
>>>> that includes the switches? Everything should be inlined just the same
>>>> if you do
>>>>
>>>> if (unlikely(tlb_addr & TLB_BSWAP)) {
>>>> st_memop(haddr, op ^ MO_BSWAP, val);
>>>> } else {
>>>> st_memop(haddr, op, val);
>>>> }
>>>
>>> I asked the same question on v2 and Richard explained that - for
>>> whatever reason - the compiler will not properly propagate the constant
>>> in the "op ^ MO_BSWAP" case.
>>
>> Even if ld_memop and st_memop are __always_inline__?
>
> I'm not sure I tried __always_inline__. I can, if you like.
FWIW, that works.
Since two of you have now asked about this, I'll change the patch.
r~
- Re: [PATCH v3 08/20] cputlb: Disable __always_inline__ without optimization, (continued)
[PATCH v3 09/20] cputlb: Replace switches in load/store_helper with callback, Richard Henderson, 2019/09/21
[PATCH v3 11/20] exec: Adjust notdirty tracing, Richard Henderson, 2019/09/21
[PATCH v3 10/20] cputlb: Introduce TLB_BSWAP, Richard Henderson, 2019/09/21
[PATCH v3 12/20] cputlb: Move ROM handling from I/O path to TLB path, Richard Henderson, 2019/09/21
[PATCH v3 13/20] cputlb: Move NOTDIRTY handling from I/O path to TLB path, Richard Henderson, 2019/09/21
[PATCH v3 14/20] cputlb: Partially inline memory_region_section_get_iotlb, Richard Henderson, 2019/09/21