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Re: [PATCH v3 09/20] cputlb: Replace switches in load/store_helper with
From: |
Paolo Bonzini |
Subject: |
Re: [PATCH v3 09/20] cputlb: Replace switches in load/store_helper with callback |
Date: |
Mon, 23 Sep 2019 11:51:02 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 |
On 22/09/19 05:54, Richard Henderson wrote:
> +/* Wrap the unaligned load helpers to that they have a common signature. */
> +static inline uint64_t wrap_ldub(const void *haddr)
> +{
> + return ldub_p(haddr);
> +}
> +
> +static inline uint64_t wrap_lduw_be(const void *haddr)
> +{
> + return lduw_be_p(haddr);
> +}
> +
> +static inline uint64_t wrap_lduw_le(const void *haddr)
> +{
> + return lduw_le_p(haddr);
> +}
> +
> +static inline uint64_t wrap_ldul_be(const void *haddr)
> +{
> + return (uint32_t)ldl_be_p(haddr);
> +}
> +
> +static inline uint64_t wrap_ldul_le(const void *haddr)
> +{
> + return (uint32_t)ldl_le_p(haddr);
> +}
Any reason to have these five functions (plus five for stores) instead
of a pair
static uint64_t ld_memop(const void *haddr, MemOp op)
{
}
static uint64_t st_memop(void *haddr, MemOp op, uint64_t val)
{
}
that includes the switches? Everything should be inlined just the same
if you do
if (unlikely(tlb_addr & TLB_BSWAP)) {
st_memop(haddr, op ^ MO_BSWAP, val);
} else {
st_memop(haddr, op, val);
}
and the like.
Paolo
> static inline uint64_t QEMU_ALWAYS_INLINE
> load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,
> uintptr_t retaddr, MemOp op, bool code_read,
> - FullLoadHelper *full_load)
> + FullLoadHelper *full_load, LoadHelper *direct)
> {
> uintptr_t mmu_idx = get_mmuidx(oi);
> uintptr_t index = tlb_index(env, mmu_idx, addr);
> @@ -1373,33 +1400,7 @@ load_helper(CPUArchState *env, target_ulong addr,
> TCGMemOpIdx oi,
>
> do_aligned_access:
> haddr = (void *)((uintptr_t)addr + entry->addend);
> - switch (op) {
> - case MO_UB:
> - res = ldub_p(haddr);
> - break;
> - case MO_BEUW:
> - res = lduw_be_p(haddr);
> - break;
> - case MO_LEUW:
> - res = lduw_le_p(haddr);
> - break;
> - case MO_BEUL:
> - res = (uint32_t)ldl_be_p(haddr);
> - break;
> - case MO_LEUL:
> - res = (uint32_t)ldl_le_p(haddr);
> - break;
> - case MO_BEQ:
> - res = ldq_be_p(haddr);
> - break;
> - case MO_LEQ:
> - res = ldq_le_p(haddr);
> - break;
> - default:
> - g_assert_not_reached();
> - }
> -
> - return res;
> + return direct(haddr);
- Re: [PATCH v3 07/20] exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY, (continued)
[PATCH v3 09/20] cputlb: Replace switches in load/store_helper with callback, Richard Henderson, 2019/09/21
[PATCH v3 11/20] exec: Adjust notdirty tracing, Richard Henderson, 2019/09/21
[PATCH v3 10/20] cputlb: Introduce TLB_BSWAP, Richard Henderson, 2019/09/21
[PATCH v3 12/20] cputlb: Move ROM handling from I/O path to TLB path, Richard Henderson, 2019/09/21