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[Qemu-devel] [PATCH v9 17/20] cpu: TLB_FLAGS_MASK bit to force memory sl
From: |
Tony Nguyen |
Subject: |
[Qemu-devel] [PATCH v9 17/20] cpu: TLB_FLAGS_MASK bit to force memory slow path |
Date: |
Sat, 24 Aug 2019 04:36:55 +1000 |
The fast path is taken when TLB_FLAGS_MASK is all zero.
TLB_FORCE_SLOW is simply a TLB_FLAGS_MASK bit to force the slow path,
there are no other side effects.
Signed-off-by: Tony Nguyen <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
include/exec/cpu-all.h | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 536ea58f81..e496f9900f 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -331,12 +331,18 @@ CPUArchState *cpu_copy(CPUArchState *env);
#define TLB_MMIO (1 << (TARGET_PAGE_BITS - 3))
/* Set if TLB entry must have MMU lookup repeated for every access */
#define TLB_RECHECK (1 << (TARGET_PAGE_BITS - 4))
+/* Set if TLB entry must take the slow path. */
+#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS - 5))
/* Use this mask to check interception with an alignment mask
* in a TCG backend.
*/
-#define TLB_FLAGS_MASK (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \
- | TLB_RECHECK)
+#define TLB_FLAGS_MASK \
+ (TLB_INVALID_MASK \
+ | TLB_NOTDIRTY \
+ | TLB_MMIO \
+ | TLB_RECHECK \
+ | TLB_FORCE_SLOW)
/**
* tlb_hit_page: return true if page aligned @addr is a hit against the
--
2.23.0
- [Qemu-devel] [PATCH v9 04/20] hw/s390x: Access MemoryRegion with MemOp, (continued)
- [Qemu-devel] [PATCH v9 04/20] hw/s390x: Access MemoryRegion with MemOp, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 05/20] hw/intc/armv7m_nic: Access MemoryRegion with MemOp, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 06/20] hw/virtio: Access MemoryRegion with MemOp, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 07/20] hw/vfio: Access MemoryRegion with MemOp, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 08/20] exec: Access MemoryRegion with MemOp, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 10/20] memory: Access MemoryRegion with MemOp, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 09/20] cputlb: Access MemoryRegion with MemOp, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 12/20] target/mips: Hard code size with MO_{8|16|32|64}, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 11/20] hw/s390x: Hard code size with MO_{8|16|32|64}, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 13/20] exec: Hard code size with MO_{8|16|32|64}, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 17/20] cpu: TLB_FLAGS_MASK bit to force memory slow path,
Tony Nguyen <=
- [Qemu-devel] [PATCH v9 15/20] cputlb: Replace size and endian operands for MemOp, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 14/20] memory: Access MemoryRegion with endianness, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 16/20] memory: Single byte swap along the I/O path, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 18/20] cputlb: Byte swap memory transaction attribute, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 19/20] target/sparc: Add TLB entry with attributes, Tony Nguyen, 2019/08/23
- [Qemu-devel] [PATCH v9 20/20] target/sparc: sun4u Invert Endian TTE bit, Tony Nguyen, 2019/08/23