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Re: [Qemu-devel] [PATCH v2 18/68] target/arm: Convert the rest of A32 Mi
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v2 18/68] target/arm: Convert the rest of A32 Miscelaneous instructions |
Date: |
Fri, 23 Aug 2019 07:33:27 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 |
On 8/23/19 5:03 AM, Peter Maydell wrote:
> On Mon, 19 Aug 2019 at 22:38, Richard Henderson
> <address@hidden> wrote:
>
> In subject, typo: "Miscellaneous".
>
>> This fixes an exiting bug with the T5 encoding of SUBS PC, LR, #IMM,
>
> "existing"
>
>> in that it may be executed from user mode as with any other encoding
>> of SUBS, not as ERET.
>
> Should this paragraph be in the commit message for the previous
> patch? This change doesn't touch SUBS/ERET.
>
> Otherwise
> Reviewed-by: Peter Maydell <address@hidden>
Indeed that text should not be here.
And also, as you might be able to tell from the text of the previous patch, it
isn't an existing bug. It took me a while to see that, and that's why I think
that passing pre-v7m through the usual SUBS path is clearer.
r~
- Re: [Qemu-devel] [PATCH v2 13/68] target/arm: Convert MRS/MSR (banked, register), (continued)
- [Qemu-devel] [PATCH v2 15/68] target/arm: Convert BX, BXJ, BLX (register), Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 17/68] target/arm: Convert ERET, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 14/68] target/arm: Convert Cyclic Redundancy Check, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 18/68] target/arm: Convert the rest of A32 Miscelaneous instructions, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 16/68] target/arm: Convert CLZ, Richard Henderson, 2019/08/19
- [Qemu-devel] [PATCH v2 19/68] target/arm: Convert T32 ADDW/SUBW, Richard Henderson, 2019/08/19