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[Qemu-devel] [PULL 01/42] spapr: quantify error messages regarding capab
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 01/42] spapr: quantify error messages regarding capability settings |
Date: |
Wed, 21 Aug 2019 17:25:01 +1000 |
From: Daniel Black <address@hidden>
Its not immediately obvious how cap-X=Y setting need to be applied
to the command line so, for spapr capability error messages, this
has been clarified to:
appending -machine cap-X=Y
The wrong value messages have been left as is, as the user has found
the right location.
Reviewed-by: Greg Kurz <address@hidden>
Signed-off-by: Daniel Black <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_caps.c | 42 ++++++++++++++++++++++++++++--------------
1 file changed, 28 insertions(+), 14 deletions(-)
diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c
index 7830d66d77..a61bf329bf 100644
--- a/hw/ppc/spapr_caps.c
+++ b/hw/ppc/spapr_caps.c
@@ -195,10 +195,12 @@ static void cap_htm_apply(SpaprMachineState *spapr,
uint8_t val, Error **errp)
}
if (tcg_enabled()) {
error_setg(errp,
- "No Transactional Memory support in TCG, try cap-htm=off");
+ "No Transactional Memory support in TCG,"
+ " try appending -machine cap-htm=off");
} else if (kvm_enabled() && !kvmppc_has_cap_htm()) {
error_setg(errp,
-"KVM implementation does not support Transactional Memory, try cap-htm=off"
+"KVM implementation does not support Transactional Memory,"
+ " try appending -machine cap-htm=off"
);
}
}
@@ -216,7 +218,8 @@ static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t
val, Error **errp)
* rid of anything that doesn't do VMX */
g_assert(env->insns_flags & PPC_ALTIVEC);
if (!(env->insns_flags2 & PPC2_VSX)) {
- error_setg(errp, "VSX support not available, try cap-vsx=off");
+ error_setg(errp, "VSX support not available,"
+ " try appending -machine cap-vsx=off");
}
}
@@ -230,7 +233,8 @@ static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t
val, Error **errp)
return;
}
if (!(env->insns_flags2 & PPC2_DFP)) {
- error_setg(errp, "DFP support not available, try cap-dfp=off");
+ error_setg(errp, "DFP support not available,"
+ " try appending -machine cap-dfp=off");
}
}
@@ -254,7 +258,8 @@ static void cap_safe_cache_apply(SpaprMachineState *spapr,
uint8_t val,
cap_cfpc_possible.vals[val]);
} else if (kvm_enabled() && (val > kvm_val)) {
error_setg(errp,
-"Requested safe cache capability level not supported by kvm, try cap-cfpc=%s",
+ "Requested safe cache capability level not supported by
kvm,"
+ " try appending -machine cap-cfpc=%s",
cap_cfpc_possible.vals[kvm_val]);
}
@@ -282,7 +287,8 @@ static void cap_safe_bounds_check_apply(SpaprMachineState
*spapr, uint8_t val,
cap_sbbc_possible.vals[val]);
} else if (kvm_enabled() && (val > kvm_val)) {
error_setg(errp,
-"Requested safe bounds check capability level not supported by kvm, try
cap-sbbc=%s",
+"Requested safe bounds check capability level not supported by kvm,"
+ " try appending -machine cap-sbbc=%s",
cap_sbbc_possible.vals[kvm_val]);
}
@@ -313,7 +319,8 @@ static void
cap_safe_indirect_branch_apply(SpaprMachineState *spapr,
cap_ibs_possible.vals[val]);
} else if (kvm_enabled() && (val > kvm_val)) {
error_setg(errp,
-"Requested safe indirect branch capability level not supported by kvm, try
cap-ibs=%s",
+"Requested safe indirect branch capability level not supported by kvm,"
+ " try appending -machine cap-ibs=%s",
cap_ibs_possible.vals[kvm_val]);
}
@@ -402,11 +409,13 @@ static void cap_nested_kvm_hv_apply(SpaprMachineState
*spapr,
if (tcg_enabled()) {
error_setg(errp,
- "No Nested KVM-HV support in tcg, try cap-nested-hv=off");
+ "No Nested KVM-HV support in tcg,"
+ " try appending -machine cap-nested-hv=off");
} else if (kvm_enabled()) {
if (!kvmppc_has_cap_nested_kvm_hv()) {
error_setg(errp,
-"KVM implementation does not support Nested KVM-HV, try cap-nested-hv=off");
+"KVM implementation does not support Nested KVM-HV,"
+ " try appending -machine cap-nested-hv=off");
} else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) {
error_setg(errp,
"Error enabling cap-nested-hv with KVM, try cap-nested-hv=off");
@@ -436,10 +445,12 @@ static void cap_large_decr_apply(SpaprMachineState *spapr,
if (!kvm_nr_bits) {
error_setg(errp,
- "No large decrementer support, try cap-large-decr=off");
+ "No large decrementer support,"
+ " try appending -machine cap-large-decr=off");
} else if (pcc->lrg_decr_bits != kvm_nr_bits) {
error_setg(errp,
-"KVM large decrementer size (%d) differs to model (%d), try
-cap-large-decr=off",
+"KVM large decrementer size (%d) differs to model (%d),"
+ " try appending -machine cap-large-decr=off",
kvm_nr_bits, pcc->lrg_decr_bits);
}
}
@@ -455,7 +466,8 @@ static void cap_large_decr_cpu_apply(SpaprMachineState
*spapr,
if (kvm_enabled()) {
if (kvmppc_enable_cap_large_decr(cpu, val)) {
error_setg(errp,
- "No large decrementer support, try cap-large-decr=off");
+ "No large decrementer support,"
+ " try appending -machine cap-large-decr=off");
}
}
@@ -475,10 +487,12 @@ static void cap_ccf_assist_apply(SpaprMachineState
*spapr, uint8_t val,
if (tcg_enabled() && val) {
/* TODO - for now only allow broken for TCG */
error_setg(errp,
-"Requested count cache flush assist capability level not supported by tcg, try
cap-ccf-assist=off");
+"Requested count cache flush assist capability level not supported by tcg,"
+ " try appending -machine cap-ccf-assist=off");
} else if (kvm_enabled() && (val > kvm_val)) {
error_setg(errp,
-"Requested count cache flush assist capability level not supported by kvm, try
cap-ccf-assist=off");
+"Requested count cache flush assist capability level not supported by kvm,"
+ " try appending -machine cap-ccf-assist=off");
}
}
--
2.21.0
- [Qemu-devel] [PULL 00/42] ppc-for-4.2 queue 20190821, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 04/42] spapr_pci: Allow 2MiB and 16MiB IOMMU pagesizes by default, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 05/42] migration: Do not re-read the clock on pre_save in case of paused guest, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 02/42] spapr_iommu: Fix xlate trace to print translated address, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 01/42] spapr: quantify error messages regarding capability settings,
David Gibson <=
- [Qemu-devel] [PULL 11/42] target/ppc: Optimize emulation of vclzw instruction, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 10/42] target/ppc: Optimize emulation of vclzd instruction, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 03/42] hw: add compat machines for 4.2, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 06/42] target/ppc: Optimize emulation of lvsl and lvsr instructions, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 09/42] target/ppc: Optimize emulation of vgbbd instruction, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 08/42] target/ppc: move opcode decode tables to PowerPCCPU, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 19/42] docs/specs: initial spec summary for Ultravisor-related hcalls, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 07/42] target/ppc: Optimize emulation of vsl and vsr instructions, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 16/42] spapr: Implement H_PROD, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 15/42] spapr: Implement dispatch tracking for tcg, David Gibson, 2019/08/21