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[Qemu-devel] [PULL 27/29] target/arm: Use tcg_gen_rotri_i32 for gen_swap
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 27/29] target/arm: Use tcg_gen_rotri_i32 for gen_swap_half |
Date: |
Fri, 16 Aug 2019 14:17:17 +0100 |
From: Richard Henderson <address@hidden>
Rotate is the more compact and obvious way to swap 16-bit
elements of a 32-bit word.
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 02ce8d44fa1..2e160646206 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -444,11 +444,7 @@ static TCGv_i64 gen_muls_i64_i32(TCGv_i32 a, TCGv_i32 b)
/* Swap low and high halfwords. */
static void gen_swap_half(TCGv_i32 var)
{
- TCGv_i32 tmp = tcg_temp_new_i32();
- tcg_gen_shri_i32(tmp, var, 16);
- tcg_gen_shli_i32(var, var, 16);
- tcg_gen_or_i32(var, var, tmp);
- tcg_temp_free_i32(tmp);
+ tcg_gen_rotri_i32(var, var, 16);
}
/* Dual 16-bit add. Result placed in t0 and t1 is marked as dead.
--
2.20.1
- [Qemu-devel] [PULL 17/29] target/arm/cpu64: Ensure kvm really supports aarch64=off, (continued)
- [Qemu-devel] [PULL 17/29] target/arm/cpu64: Ensure kvm really supports aarch64=off, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 05/29] target/arm: Fix routing of singlestep exceptions, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 10/29] target/arm: Remove redundant s->pc & ~1, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 11/29] target/arm: Replace s->pc with s->base.pc_next, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 15/29] target/arm: Use unallocated_encoding for aarch32, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 12/29] target/arm: Replace offset with pc in gen_exception_insn, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 18/29] target/arm/cpu: Ensure we can use the pmu with kvm, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 20/29] target/arm/cpu: Use div-round-up to determine predicate register array size, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 21/29] target/arm/kvm64: Fix error returns, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 24/29] target/arm: Use tcg_gen_deposit_i32 for PKHBT, PKHTB, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 27/29] target/arm: Use tcg_gen_rotri_i32 for gen_swap_half,
Peter Maydell <=
- [Qemu-devel] [PULL 23/29] target/arm: Use tcg_gen_extract_i32 for shifter_out_im, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 25/29] target/arm: Remove redundant shift tests, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 22/29] target/arm/kvm64: Move the get/put of fpsimd registers out, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 26/29] target/arm: Use ror32 instead of open-coding the operation, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 28/29] target/arm: Simplify SMMLA, SMMLAR, SMMLS, SMMLSR, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 29/29] target/arm: Use tcg_gen_extrh_i64_i32 to extract the high word, Peter Maydell, 2019/08/16
- Re: [Qemu-devel] [PULL 00/29] target-arm queue, Peter Maydell, 2019/08/16