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[Qemu-devel] [PULL 20/29] target/arm/cpu: Use div-round-up to determine
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 20/29] target/arm/cpu: Use div-round-up to determine predicate register array size |
Date: |
Fri, 16 Aug 2019 14:17:10 +0100 |
From: Andrew Jones <address@hidden>
Unless we're guaranteed to always increase ARM_MAX_VQ by a multiple of
four, then we should use DIV_ROUND_UP to ensure we get an appropriate
array size.
Signed-off-by: Andrew Jones <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index d12c7460859..ab5d58a9d41 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -195,7 +195,7 @@ typedef struct ARMVectorReg {
#ifdef TARGET_AARCH64
/* In AArch32 mode, predicate registers do not exist at all. */
typedef struct ARMPredicateReg {
- uint64_t p[2 * ARM_MAX_VQ / 8] QEMU_ALIGNED(16);
+ uint64_t p[DIV_ROUND_UP(2 * ARM_MAX_VQ, 8)] QEMU_ALIGNED(16);
} ARMPredicateReg;
/* In AArch32 mode, PAC keys do not exist at all. */
--
2.20.1
- [Qemu-devel] [PULL 14/29] target/arm: Remove offset argument to gen_exception_bkpt_insn, (continued)
- [Qemu-devel] [PULL 14/29] target/arm: Remove offset argument to gen_exception_bkpt_insn, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 13/29] target/arm: Replace offset with pc in gen_exception_internal_insn, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 19/29] target/arm/helper: zcr: Add build bug next to value range assumption, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 17/29] target/arm/cpu64: Ensure kvm really supports aarch64=off, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 05/29] target/arm: Fix routing of singlestep exceptions, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 10/29] target/arm: Remove redundant s->pc & ~1, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 11/29] target/arm: Replace s->pc with s->base.pc_next, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 15/29] target/arm: Use unallocated_encoding for aarch32, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 12/29] target/arm: Replace offset with pc in gen_exception_insn, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 18/29] target/arm/cpu: Ensure we can use the pmu with kvm, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 20/29] target/arm/cpu: Use div-round-up to determine predicate register array size,
Peter Maydell <=
- [Qemu-devel] [PULL 21/29] target/arm/kvm64: Fix error returns, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 24/29] target/arm: Use tcg_gen_deposit_i32 for PKHBT, PKHTB, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 27/29] target/arm: Use tcg_gen_rotri_i32 for gen_swap_half, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 23/29] target/arm: Use tcg_gen_extract_i32 for shifter_out_im, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 25/29] target/arm: Remove redundant shift tests, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 22/29] target/arm/kvm64: Move the get/put of fpsimd registers out, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 26/29] target/arm: Use ror32 instead of open-coding the operation, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 28/29] target/arm: Simplify SMMLA, SMMLAR, SMMLS, SMMLSR, Peter Maydell, 2019/08/16
- [Qemu-devel] [PULL 29/29] target/arm: Use tcg_gen_extrh_i64_i32 to extract the high word, Peter Maydell, 2019/08/16
- Re: [Qemu-devel] [PULL 00/29] target-arm queue, Peter Maydell, 2019/08/16