Re: [Qemu-devel] [Patch] ARM: Add an L2 cache controller to KZM

[Andreas Färber]

Am 05.08.2013 11:18, schrieb Peter Maydell:
> On 5 August 2013 02:21, Peter Chubb <address@hidden> wrote:
>> Reads to unassigned memory now return non-zero (since patch
>> 9b8c69243585). This breaks guests runnong on i.MX31 that use the
>> cache controller --- they poll forever waiting for the L2CC cache
>> invalidate regsiter to be zero.
> 
> That commit claims it was just restoring the previous
> behaviour, so it shouldn't break guests, surely?

See Jan's patches on the list. PReP was reported affected, too.

Peter Ch., if you know the exact differences, why don't you just derive
an imx-l2cc type (or so) derived from ARM's type, overriding the values
mentioned above? Sounds trivial to me.

Regards,
Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg