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[PATCH 08/33] hw/cpu/arm: Declare CPU QOM types using DEFINE_TYPES() mac
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 08/33] hw/cpu/arm: Declare CPU QOM types using DEFINE_TYPES() macro |
Date: |
Tue, 12 Dec 2023 17:29:08 +0100 |
When multiple QOM types are registered in the same file,
it is simpler to use the the DEFINE_TYPES() macro. In
particular because type array declared with such macro
are easier to review.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/cpu/a15mpcore.c | 21 +++++++++------------
hw/cpu/a9mpcore.c | 21 +++++++++------------
hw/cpu/arm11mpcore.c | 21 +++++++++------------
hw/cpu/realview_mpcore.c | 21 +++++++++------------
4 files changed, 36 insertions(+), 48 deletions(-)
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index a40f142128..c2ee985fb4 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -164,17 +164,14 @@ static void a15mp_priv_class_init(ObjectClass *klass,
void *data)
/* We currently have no saveable state */
}
-static const TypeInfo a15mp_priv_info = {
- .name = TYPE_A15MPCORE_PRIV,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(A15MPPrivState),
- .instance_init = a15mp_priv_initfn,
- .class_init = a15mp_priv_class_init,
+static const TypeInfo a15mp_types[] = {
+ {
+ .name = TYPE_A15MPCORE_PRIV,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(A15MPPrivState),
+ .instance_init = a15mp_priv_initfn,
+ .class_init = a15mp_priv_class_init,
+ },
};
-static void a15mp_register_types(void)
-{
- type_register_static(&a15mp_priv_info);
-}
-
-type_init(a15mp_register_types)
+DEFINE_TYPES(a15mp_types)
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c
index d03f57e579..6b5ce01246 100644
--- a/hw/cpu/a9mpcore.c
+++ b/hw/cpu/a9mpcore.c
@@ -178,17 +178,14 @@ static void a9mp_priv_class_init(ObjectClass *klass, void
*data)
device_class_set_props(dc, a9mp_priv_properties);
}
-static const TypeInfo a9mp_priv_info = {
- .name = TYPE_A9MPCORE_PRIV,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(A9MPPrivState),
- .instance_init = a9mp_priv_initfn,
- .class_init = a9mp_priv_class_init,
+static const TypeInfo a9mp_types[] = {
+ {
+ .name = TYPE_A9MPCORE_PRIV,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(A9MPPrivState),
+ .instance_init = a9mp_priv_initfn,
+ .class_init = a9mp_priv_class_init,
+ },
};
-static void a9mp_register_types(void)
-{
- type_register_static(&a9mp_priv_info);
-}
-
-type_init(a9mp_register_types)
+DEFINE_TYPES(a9mp_types)
diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c
index 89c4e35143..74f44434de 100644
--- a/hw/cpu/arm11mpcore.c
+++ b/hw/cpu/arm11mpcore.c
@@ -153,17 +153,14 @@ static void mpcore_priv_class_init(ObjectClass *klass,
void *data)
device_class_set_props(dc, mpcore_priv_properties);
}
-static const TypeInfo mpcore_priv_info = {
- .name = TYPE_ARM11MPCORE_PRIV,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(ARM11MPCorePriveState),
- .instance_init = mpcore_priv_initfn,
- .class_init = mpcore_priv_class_init,
+static const TypeInfo arm11mp_types[] = {
+ {
+ .name = TYPE_ARM11MPCORE_PRIV,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(ARM11MPCorePriveState),
+ .instance_init = mpcore_priv_initfn,
+ .class_init = mpcore_priv_class_init,
+ },
};
-static void arm11mpcore_register_types(void)
-{
- type_register_static(&mpcore_priv_info);
-}
-
-type_init(arm11mpcore_register_types)
+DEFINE_TYPES(arm11mp_types)
diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c
index 7480b38d1a..b140888618 100644
--- a/hw/cpu/realview_mpcore.c
+++ b/hw/cpu/realview_mpcore.c
@@ -114,17 +114,14 @@ static void mpcore_rirq_class_init(ObjectClass *klass,
void *data)
dc->realize = realview_mpcore_realize;
}
-static const TypeInfo mpcore_rirq_info = {
- .name = TYPE_REALVIEW_MPCORE_RIRQ,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(mpcore_rirq_state),
- .instance_init = mpcore_rirq_init,
- .class_init = mpcore_rirq_class_init,
+static const TypeInfo realview_mpcore_types[] = {
+ {
+ .name = TYPE_REALVIEW_MPCORE_RIRQ,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(mpcore_rirq_state),
+ .instance_init = mpcore_rirq_init,
+ .class_init = mpcore_rirq_class_init,
+ },
};
-static void realview_mpcore_register_types(void)
-{
- type_register_static(&mpcore_rirq_info);
-}
-
-type_init(realview_mpcore_register_types)
+DEFINE_TYPES(realview_mpcore_types)
--
2.41.0
- [PATCH 00/33] hw/cpu/arm: Remove one use of qemu_get_cpu() in A7/A15 MPCore priv, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 01/33] hw/arm/boot: Propagate vCPU to arm_load_dtb(), Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 02/33] hw/arm/fsl-imx6: Add a local 'gic' variable, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 03/33] hw/arm/fsl-imx6ul: Add a local 'gic' variable, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 04/33] hw/arm/fsl-imx7: Add a local 'gic' variable, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 05/33] hw/cpu: Remove dead Kconfig, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 06/33] hw/cpu/arm: Rename 'busdev' -> 'gicsbd' in a15mp_priv_realize(), Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 07/33] hw/cpu/arm: Alias 'num-cpu' property on TYPE_REALVIEW_MPCORE, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 08/33] hw/cpu/arm: Declare CPU QOM types using DEFINE_TYPES() macro,
Philippe Mathieu-Daudé <=
- [PATCH 09/33] hw/cpu/arm: Merge {a9mpcore.h, a15mpcore.h} as cortex_mpcore.h, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 10/33] hw/cpu/arm: Introduce abstract CORTEX_MPCORE_PRIV QOM type, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 11/33] hw/cpu/arm: Have A9MPCORE/A15MPCORE inheritate common CORTEX_MPCORE_PRIV, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 12/33] hw/cpu/arm: Create MPCore container in QOM parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 13/33] hw/cpu/arm: Handle 'num_cores' property once in MPCore parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 14/33] hw/cpu/arm: Handle 'has_el2/3' properties once in MPCore parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 15/33] hw/cpu/arm: Handle 'gic-irq' property once in MPCore parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 16/33] hw/cpu/arm: Handle GIC once in MPCore parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 17/33] hw/cpu/arm: Document more properties of CORTEX_MPCORE_PRIV QOM type, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 18/33] hw/cpu/arm: Replace A15MPPrivState by CortexMPPrivState, Philippe Mathieu-Daudé, 2023/12/12