[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 03/33] hw/arm/fsl-imx6ul: Add a local 'gic' variable
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 03/33] hw/arm/fsl-imx6ul: Add a local 'gic' variable |
Date: |
Tue, 12 Dec 2023 17:29:03 +0100 |
The A7MPCore forward the IRQs from its internal GIC.
To make the code clearer, add a 'gic' variable.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/fsl-imx6ul.c | 38 ++++++++++++++------------------------
1 file changed, 14 insertions(+), 24 deletions(-)
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index e37b69a5e1..59032263cf 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -156,6 +156,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
{
MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6ULState *s = FSL_IMX6UL(dev);
+ DeviceState *gic;
int i;
char name[NAME_SIZE];
SysBusDevice *sbd;
@@ -177,6 +178,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_MAX_IRQ + GIC_INTERNAL, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, FSL_IMX6UL_A7MPCORE_ADDR);
+ gic = DEVICE(&s->a7mpcore);
sbd = SYS_BUS_DEVICE(&s->a7mpcore);
d = DEVICE(&s->cpu);
@@ -213,8 +215,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_GPTn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_GPTn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_GPTn_IRQ[i]));
}
/*
@@ -238,8 +239,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_EPITn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_EPITn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_EPITn_IRQ[i]));
}
/*
@@ -276,12 +276,10 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_GPIOn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_GPIOn_LOW_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_GPIOn_LOW_IRQ[i]));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_GPIOn_HIGH_IRQ[i]));
+ qdev_get_gpio_in(gic,
FSL_IMX6UL_GPIOn_HIGH_IRQ[i]));
}
/*
@@ -335,8 +333,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_SPIn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_SPIn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_SPIn_IRQ[i]));
}
/*
@@ -361,8 +358,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0,
FSL_IMX6UL_I2Cn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_I2Cn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_I2Cn_IRQ[i]));
}
/*
@@ -399,8 +395,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_UARTn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_UARTn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_UARTn_IRQ[i]));
}
/*
@@ -449,12 +444,10 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_ENETn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_ENETn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_ENETn_IRQ[i]));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 1,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_ENETn_TIMER_IRQ[i]));
+ qdev_get_gpio_in(gic,
FSL_IMX6UL_ENETn_TIMER_IRQ[i]));
}
/*
@@ -490,8 +483,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
FSL_IMX6UL_USB02_USBn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_USBn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_USBn_IRQ[i]));
}
/*
@@ -516,8 +508,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_USDHCn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->usdhc[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_USDHCn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_USDHCn_IRQ[i]));
}
/*
@@ -549,8 +540,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0,
FSL_IMX6UL_WDOGn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_WDOGn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_WDOGn_IRQ[i]));
}
/*
--
2.41.0
- [PATCH 00/33] hw/cpu/arm: Remove one use of qemu_get_cpu() in A7/A15 MPCore priv, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 01/33] hw/arm/boot: Propagate vCPU to arm_load_dtb(), Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 02/33] hw/arm/fsl-imx6: Add a local 'gic' variable, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 03/33] hw/arm/fsl-imx6ul: Add a local 'gic' variable,
Philippe Mathieu-Daudé <=
- [PATCH 04/33] hw/arm/fsl-imx7: Add a local 'gic' variable, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 05/33] hw/cpu: Remove dead Kconfig, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 06/33] hw/cpu/arm: Rename 'busdev' -> 'gicsbd' in a15mp_priv_realize(), Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 07/33] hw/cpu/arm: Alias 'num-cpu' property on TYPE_REALVIEW_MPCORE, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 08/33] hw/cpu/arm: Declare CPU QOM types using DEFINE_TYPES() macro, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 09/33] hw/cpu/arm: Merge {a9mpcore.h, a15mpcore.h} as cortex_mpcore.h, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 10/33] hw/cpu/arm: Introduce abstract CORTEX_MPCORE_PRIV QOM type, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 11/33] hw/cpu/arm: Have A9MPCORE/A15MPCORE inheritate common CORTEX_MPCORE_PRIV, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 12/33] hw/cpu/arm: Create MPCore container in QOM parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 13/33] hw/cpu/arm: Handle 'num_cores' property once in MPCore parent, Philippe Mathieu-Daudé, 2023/12/12