[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 10/19] aspeed: fby35: Add a bootrom for the BMC
From: |
Cédric Le Goater |
Subject: |
[PULL 10/19] aspeed: fby35: Add a bootrom for the BMC |
Date: |
Wed, 13 Jul 2022 09:52:46 +0200 |
The BMC boots from the first flash device by fetching instructions
from the flash contents. Add an alias region on 0x0 for this
purpose. There are currently performance issues with this method (TBs
being flushed too often), so as a faster alternative, install the
flash contents as a ROM in the BMC memory space.
See commit 1a15311a12fa ("hw/arm/aspeed: add a 'execute-in-place'
property to boot directly from CE0")
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Delevoryas <peter@pjd.dev>
Message-Id: <20220705191400.41632-8-peter@pjd.dev>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/arm/fby35.c | 83 ++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 83 insertions(+)
diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c
index 5c5224d37471..d3edfa3b108e 100644
--- a/hw/arm/fby35.c
+++ b/hw/arm/fby35.c
@@ -9,6 +9,7 @@
#include "qemu/units.h"
#include "qapi/error.h"
#include "sysemu/sysemu.h"
+#include "sysemu/block-backend.h"
#include "hw/boards.h"
#include "hw/arm/aspeed_soc.h"
@@ -23,12 +24,49 @@ struct Fby35State {
MemoryRegion bmc_boot_rom;
AspeedSoCState bmc;
+
+ bool mmio_exec;
};
#define FBY35_BMC_RAM_SIZE (2 * GiB)
+#define FBY35_BMC_FIRMWARE_ADDR 0x0
+
+static void fby35_bmc_write_boot_rom(DriveInfo *dinfo, MemoryRegion *mr,
+ hwaddr offset, size_t rom_size,
+ Error **errp)
+{
+ BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
+ g_autofree void *storage = NULL;
+ int64_t size;
+
+ /*
+ * The block backend size should have already been 'validated' by
+ * the creation of the m25p80 object.
+ */
+ size = blk_getlength(blk);
+ if (size <= 0) {
+ error_setg(errp, "failed to get flash size");
+ return;
+ }
+
+ if (rom_size > size) {
+ rom_size = size;
+ }
+
+ storage = g_malloc0(rom_size);
+ if (blk_pread(blk, 0, storage, rom_size) < 0) {
+ error_setg(errp, "failed to read the initial flash content");
+ return;
+ }
+
+ /* TODO: find a better way to install the ROM */
+ memcpy(memory_region_get_ram_ptr(mr) + offset, storage, rom_size);
+}
static void fby35_bmc_init(Fby35State *s)
{
+ DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
+
memory_region_init(&s->bmc_memory, OBJECT(s), "bmc-memory", UINT64_MAX);
memory_region_init_ram(&s->bmc_dram, OBJECT(s), "bmc-dram",
FBY35_BMC_RAM_SIZE, &error_abort);
@@ -48,6 +86,28 @@ static void fby35_bmc_init(Fby35State *s)
qdev_realize(DEVICE(&s->bmc), NULL, &error_abort);
aspeed_board_init_flashes(&s->bmc.fmc, "n25q00", 2, 0);
+
+ /* Install first FMC flash content as a boot rom. */
+ if (drive0) {
+ AspeedSMCFlash *fl = &s->bmc.fmc.flashes[0];
+ MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
+ uint64_t size = memory_region_size(&fl->mmio);
+
+ if (s->mmio_exec) {
+ memory_region_init_alias(boot_rom, NULL, "aspeed.boot_rom",
+ &fl->mmio, 0, size);
+ memory_region_add_subregion(&s->bmc_memory,
FBY35_BMC_FIRMWARE_ADDR,
+ boot_rom);
+ } else {
+
+ memory_region_init_rom(boot_rom, NULL, "aspeed.boot_rom",
+ size, &error_abort);
+ memory_region_add_subregion(&s->bmc_memory,
FBY35_BMC_FIRMWARE_ADDR,
+ boot_rom);
+ fby35_bmc_write_boot_rom(drive0, boot_rom, FBY35_BMC_FIRMWARE_ADDR,
+ size, &error_abort);
+ }
+ }
}
static void fby35_init(MachineState *machine)
@@ -57,6 +117,22 @@ static void fby35_init(MachineState *machine)
fby35_bmc_init(s);
}
+
+static bool fby35_get_mmio_exec(Object *obj, Error **errp)
+{
+ return FBY35(obj)->mmio_exec;
+}
+
+static void fby35_set_mmio_exec(Object *obj, bool value, Error **errp)
+{
+ FBY35(obj)->mmio_exec = value;
+}
+
+static void fby35_instance_init(Object *obj)
+{
+ FBY35(obj)->mmio_exec = false;
+}
+
static void fby35_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -66,6 +142,12 @@ static void fby35_class_init(ObjectClass *oc, void *data)
mc->no_floppy = 1;
mc->no_cdrom = 1;
mc->min_cpus = mc->max_cpus = mc->default_cpus = 2;
+
+ object_class_property_add_bool(oc, "execute-in-place",
+ fby35_get_mmio_exec,
+ fby35_set_mmio_exec);
+ object_class_property_set_description(oc, "execute-in-place",
+ "boot directly from CE0 flash device");
}
static const TypeInfo fby35_types[] = {
@@ -74,6 +156,7 @@ static const TypeInfo fby35_types[] = {
.parent = TYPE_MACHINE,
.class_init = fby35_class_init,
.instance_size = sizeof(Fby35State),
+ .instance_init = fby35_instance_init,
},
};
--
2.35.3
- [PULL 03/19] hw/sensor: Add IC_DEVICE_ID to ISL voltage regulators, (continued)
- [PULL 03/19] hw/sensor: Add IC_DEVICE_ID to ISL voltage regulators, Cédric Le Goater, 2022/07/13
- [PULL 04/19] hw/sensor: Add Renesas ISL69259 device model, Cédric Le Goater, 2022/07/13
- [PULL 06/19] aspeed: Refactor UART init for multi-SoC machines, Cédric Le Goater, 2022/07/13
- [PULL 07/19] aspeed: Make aspeed_board_init_flashes public, Cédric Le Goater, 2022/07/13
- [PULL 14/19] test/avocado/machine_aspeed.py: Add SDK tests, Cédric Le Goater, 2022/07/13
- [PULL 08/19] aspeed: Add fby35 skeleton, Cédric Le Goater, 2022/07/13
- [PULL 05/19] aspeed: Create SRAM name from first CPU index, Cédric Le Goater, 2022/07/13
- [PULL 11/19] aspeed: Add AST1030 (BIC) to fby35, Cédric Le Goater, 2022/07/13
- [PULL 15/19] hw: m25p80: Add Block Protect and Top Bottom bits for write protect, Cédric Le Goater, 2022/07/13
- [PULL 09/19] aspeed: Add AST2600 (BMC) to fby35, Cédric Le Goater, 2022/07/13
- [PULL 10/19] aspeed: fby35: Add a bootrom for the BMC,
Cédric Le Goater <=
- [PULL 12/19] docs: aspeed: Add fby35 multi-SoC machine section, Cédric Le Goater, 2022/07/13
- [PULL 13/19] docs: aspeed: Minor updates, Cédric Le Goater, 2022/07/13
- [PULL 16/19] hw: m25p80: add tests for BP and TB bit write protect, Cédric Le Goater, 2022/07/13
- [PULL 18/19] hw/gpio/aspeed: Don't let guests modify input pins, Cédric Le Goater, 2022/07/13
- [PULL 17/19] qtest/aspeed_gpio: Add input pin modification test, Cédric Le Goater, 2022/07/13
- [PULL 19/19] aspeed: Add fby35-bmc slot GPIO's, Cédric Le Goater, 2022/07/13
- Re: [PULL 00/19] aspeed queue, Peter Maydell, 2022/07/14