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[PULL 11/19] aspeed: Add AST1030 (BIC) to fby35
From: |
Cédric Le Goater |
Subject: |
[PULL 11/19] aspeed: Add AST1030 (BIC) to fby35 |
Date: |
Wed, 13 Jul 2022 09:52:47 +0200 |
From: Peter Delevoryas <peter@pjd.dev>
With the BIC, the easiest way to run everything is to create two pty's
for each SoC and reserve stdin/stdout for the monitor:
wget
https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd
wget
https://github.com/peterdelevoryas/OpenBIC/releases/download/oby35-cl-2022.13.01/Y35BCL.elf
qemu-system-arm -machine fby35 \
-drive file=fby35.mtd,format=raw,if=mtd \
-device loader,file=fby35.mtd,addr=0,cpu-num=0 \
-serial pty -serial pty -serial mon:stdio -display none -S
screen /dev/ttys0
screen /dev/ttys1
(qemu) c
This commit only adds the the first server board's Bridge IC, but in the
future we'll try to include the other three server board Bridge IC's
too.
Signed-off-by: Peter Delevoryas <peter@pjd.dev>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220705191400.41632-9-peter@pjd.dev>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/arm/fby35.c | 27 ++++++++++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c
index d3edfa3b108e..031602800fde 100644
--- a/hw/arm/fby35.c
+++ b/hw/arm/fby35.c
@@ -11,7 +11,9 @@
#include "sysemu/sysemu.h"
#include "sysemu/block-backend.h"
#include "hw/boards.h"
+#include "hw/qdev-clock.h"
#include "hw/arm/aspeed_soc.h"
+#include "hw/arm/boot.h"
#define TYPE_FBY35 MACHINE_TYPE_NAME("fby35")
OBJECT_DECLARE_SIMPLE_TYPE(Fby35State, FBY35);
@@ -22,8 +24,11 @@ struct Fby35State {
MemoryRegion bmc_memory;
MemoryRegion bmc_dram;
MemoryRegion bmc_boot_rom;
+ MemoryRegion bic_memory;
+ Clock *bic_sysclk;
AspeedSoCState bmc;
+ AspeedSoCState bic;
bool mmio_exec;
};
@@ -110,11 +115,31 @@ static void fby35_bmc_init(Fby35State *s)
}
}
+static void fby35_bic_init(Fby35State *s)
+{
+ s->bic_sysclk = clock_new(OBJECT(s), "SYSCLK");
+ clock_set_hz(s->bic_sysclk, 200000000ULL);
+
+ memory_region_init(&s->bic_memory, OBJECT(s), "bic-memory", UINT64_MAX);
+
+ object_initialize_child(OBJECT(s), "bic", &s->bic, "ast1030-a1");
+ qdev_connect_clock_in(DEVICE(&s->bic), "sysclk", s->bic_sysclk);
+ object_property_set_link(OBJECT(&s->bic), "memory", OBJECT(&s->bic_memory),
+ &error_abort);
+ aspeed_soc_uart_set_chr(&s->bic, ASPEED_DEV_UART5, serial_hd(1));
+ qdev_realize(DEVICE(&s->bic), NULL, &error_abort);
+
+ aspeed_board_init_flashes(&s->bic.fmc, "sst25vf032b", 2, 2);
+ aspeed_board_init_flashes(&s->bic.spi[0], "sst25vf032b", 2, 4);
+ aspeed_board_init_flashes(&s->bic.spi[1], "sst25vf032b", 2, 6);
+}
+
static void fby35_init(MachineState *machine)
{
Fby35State *s = FBY35(machine);
fby35_bmc_init(s);
+ fby35_bic_init(s);
}
@@ -141,7 +166,7 @@ static void fby35_class_init(ObjectClass *oc, void *data)
mc->init = fby35_init;
mc->no_floppy = 1;
mc->no_cdrom = 1;
- mc->min_cpus = mc->max_cpus = mc->default_cpus = 2;
+ mc->min_cpus = mc->max_cpus = mc->default_cpus = 3;
object_class_property_add_bool(oc, "execute-in-place",
fby35_get_mmio_exec,
--
2.35.3
- [PULL 00/19] aspeed queue, Cédric Le Goater, 2022/07/13
- [PULL 02/19] hw/i2c/pmbus: Add idle state to return 0xff's, Cédric Le Goater, 2022/07/13
- [PULL 01/19] aspeed: sbc: Allow per-machine settings, Cédric Le Goater, 2022/07/13
- [PULL 03/19] hw/sensor: Add IC_DEVICE_ID to ISL voltage regulators, Cédric Le Goater, 2022/07/13
- [PULL 04/19] hw/sensor: Add Renesas ISL69259 device model, Cédric Le Goater, 2022/07/13
- [PULL 06/19] aspeed: Refactor UART init for multi-SoC machines, Cédric Le Goater, 2022/07/13
- [PULL 07/19] aspeed: Make aspeed_board_init_flashes public, Cédric Le Goater, 2022/07/13
- [PULL 14/19] test/avocado/machine_aspeed.py: Add SDK tests, Cédric Le Goater, 2022/07/13
- [PULL 08/19] aspeed: Add fby35 skeleton, Cédric Le Goater, 2022/07/13
- [PULL 05/19] aspeed: Create SRAM name from first CPU index, Cédric Le Goater, 2022/07/13
- [PULL 11/19] aspeed: Add AST1030 (BIC) to fby35,
Cédric Le Goater <=
- [PULL 15/19] hw: m25p80: Add Block Protect and Top Bottom bits for write protect, Cédric Le Goater, 2022/07/13
- [PULL 09/19] aspeed: Add AST2600 (BMC) to fby35, Cédric Le Goater, 2022/07/13
- [PULL 10/19] aspeed: fby35: Add a bootrom for the BMC, Cédric Le Goater, 2022/07/13
- [PULL 12/19] docs: aspeed: Add fby35 multi-SoC machine section, Cédric Le Goater, 2022/07/13
- [PULL 13/19] docs: aspeed: Minor updates, Cédric Le Goater, 2022/07/13
- [PULL 16/19] hw: m25p80: add tests for BP and TB bit write protect, Cédric Le Goater, 2022/07/13
- [PULL 18/19] hw/gpio/aspeed: Don't let guests modify input pins, Cédric Le Goater, 2022/07/13
- [PULL 17/19] qtest/aspeed_gpio: Add input pin modification test, Cédric Le Goater, 2022/07/13
- [PULL 19/19] aspeed: Add fby35-bmc slot GPIO's, Cédric Le Goater, 2022/07/13
- Re: [PULL 00/19] aspeed queue, Peter Maydell, 2022/07/14