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[PATCH v3 18/51] target/arm: Introduce sve_vqm1_for_el_sm
From: |
Richard Henderson |
Subject: |
[PATCH v3 18/51] target/arm: Introduce sve_vqm1_for_el_sm |
Date: |
Mon, 20 Jun 2022 10:52:02 -0700 |
When Streaming SVE mode is enabled, the size is taken from
SMCR_ELx instead of ZCR_ELx. The format is shared, but the
set of vector lengths is not. Further, Streaming SVE does
not require any particular length to be supported.
Adjust sve_vqm1_for_el to pass the current value of PSTATE.SM
to the new function.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 9 +++++++--
target/arm/helper.c | 32 +++++++++++++++++++++++++-------
2 files changed, 32 insertions(+), 9 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 8b00d29af4..244f8428e9 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1140,13 +1140,18 @@ int sve_exception_el(CPUARMState *env, int cur_el);
int sme_exception_el(CPUARMState *env, int cur_el);
/**
- * sve_vqm1_for_el:
+ * sve_vqm1_for_el_sm:
* @env: CPUARMState
* @el: exception level
+ * @sm: streaming mode
*
- * Compute the current SVE vector length for @el, in units of
+ * Compute the current vector length for @el & @sm, in units of
* Quadwords Minus 1 -- the same scale used for ZCR_ELx.LEN.
+ * If @sm, compute for SVL, otherwise NVL.
*/
+uint32_t sve_vqm1_for_el_sm(CPUARMState *env, int el, bool sm);
+
+/* Likewise, but using @sm = PSTATE.SM. */
uint32_t sve_vqm1_for_el(CPUARMState *env, int el);
static inline bool is_a64(CPUARMState *env)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index a80ca461e5..2e4e739969 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6272,23 +6272,41 @@ int sme_exception_el(CPUARMState *env, int el)
/*
* Given that SVE is enabled, return the vector length for EL.
*/
-uint32_t sve_vqm1_for_el(CPUARMState *env, int el)
+uint32_t sve_vqm1_for_el_sm(CPUARMState *env, int el, bool sm)
{
ARMCPU *cpu = env_archcpu(env);
- uint32_t len = cpu->sve_max_vq - 1;
+ uint64_t *cr = env->vfp.zcr_el;
+ uint32_t map = cpu->sve_vq.map;
+ uint32_t len = ARM_MAX_VQ - 1;
+
+ if (sm) {
+ cr = env->vfp.smcr_el;
+ map = cpu->sme_vq.map;
+ }
if (el <= 1 && !el_is_in_host(env, el)) {
- len = MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[1]);
+ len = MIN(len, 0xf & (uint32_t)cr[1]);
}
if (el <= 2 && arm_feature(env, ARM_FEATURE_EL2)) {
- len = MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[2]);
+ len = MIN(len, 0xf & (uint32_t)cr[2]);
}
if (arm_feature(env, ARM_FEATURE_EL3)) {
- len = MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[3]);
+ len = MIN(len, 0xf & (uint32_t)cr[3]);
}
- len = 31 - clz32(cpu->sve_vq.map & MAKE_64BIT_MASK(0, len + 1));
- return len;
+ map &= MAKE_64BIT_MASK(0, len + 1);
+ if (map != 0) {
+ return 31 - clz32(map);
+ }
+
+ /* Bit 0 is always set for Normal SVE -- not so for Streaming SVE. */
+ assert(sm);
+ return ctz32(cpu->sme_vq.map);
+}
+
+uint32_t sve_vqm1_for_el(CPUARMState *env, int el)
+{
+ return sve_vqm1_for_el_sm(env, el, FIELD_EX64(env->svcr, SVCR, SM));
}
static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
--
2.34.1
- Re: [PATCH v3 09/51] target/arm: Add the SME ZA storage to CPUARMState, (continued)
- [PATCH v3 11/51] target/arm: Move error for sve%d property to arm_cpu_sve_finalize, Richard Henderson, 2022/06/20
- [PATCH v3 12/51] target/arm: Create ARMVQMap, Richard Henderson, 2022/06/20
- [PATCH v3 14/51] target/arm: Generalize cpu_arm_{get, set}_default_vec_len, Richard Henderson, 2022/06/20
- [PATCH v3 16/51] target/arm: Unexport aarch64_add_*_properties, Richard Henderson, 2022/06/20
- [PATCH v3 13/51] target/arm: Generalize cpu_arm_{get,set}_vq, Richard Henderson, 2022/06/20
- [PATCH v3 17/51] target/arm: Add cpu properties for SME, Richard Henderson, 2022/06/20
- [PATCH v3 19/51] target/arm: Add SVL to TB flags, Richard Henderson, 2022/06/20
- [PATCH v3 20/51] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h, Richard Henderson, 2022/06/20
- [PATCH v3 18/51] target/arm: Introduce sve_vqm1_for_el_sm,
Richard Henderson <=
- [PATCH v3 22/51] target/arm: Trap AdvSIMD usage when Streaming SVE is active, Richard Henderson, 2022/06/20
[PATCH v3 28/51] target/arm: Implement SME LDR, STR, Richard Henderson, 2022/06/20
[PATCH v3 29/51] target/arm: Implement SME ADDHA, ADDVA, Richard Henderson, 2022/06/20
[PATCH v3 30/51] target/arm: Implement FMOPA, FMOPS (non-widening), Richard Henderson, 2022/06/20