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[PATCH v3 13/51] target/arm: Generalize cpu_arm_{get,set}_vq
From: |
Richard Henderson |
Subject: |
[PATCH v3 13/51] target/arm: Generalize cpu_arm_{get,set}_vq |
Date: |
Mon, 20 Jun 2022 10:51:57 -0700 |
Rename from cpu_arm_{get,set}_sve_vq, and take the
ARMVQMap as the opaque parameter.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu64.c | 29 +++++++++++++++--------------
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index cadc401c7e..1a3cb953bf 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -579,15 +579,15 @@ static void cpu_max_set_sve_max_vq(Object *obj, Visitor
*v, const char *name,
}
/*
- * Note that cpu_arm_get/set_sve_vq cannot use the simpler
- * object_property_add_bool interface because they make use
- * of the contents of "name" to determine which bit on which
- * to operate.
+ * Note that cpu_arm_{get,set}_vq cannot use the simpler
+ * object_property_add_bool interface because they make use of the
+ * contents of "name" to determine which bit on which to operate.
*/
-static void cpu_arm_get_sve_vq(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
+static void cpu_arm_get_vq(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
{
ARMCPU *cpu = ARM_CPU(obj);
+ ARMVQMap *vq_map = opaque;
uint32_t vq = atoi(&name[3]) / 128;
bool value;
@@ -595,15 +595,15 @@ static void cpu_arm_get_sve_vq(Object *obj, Visitor *v,
const char *name,
if (!cpu_isar_feature(aa64_sve, cpu)) {
value = false;
} else {
- value = extract32(cpu->sve_vq.map, vq - 1, 1);
+ value = extract32(vq_map->map, vq - 1, 1);
}
visit_type_bool(v, name, &value, errp);
}
-static void cpu_arm_set_sve_vq(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
+static void cpu_arm_set_vq(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
{
- ARMCPU *cpu = ARM_CPU(obj);
+ ARMVQMap *vq_map = opaque;
uint32_t vq = atoi(&name[3]) / 128;
bool value;
@@ -611,8 +611,8 @@ static void cpu_arm_set_sve_vq(Object *obj, Visitor *v,
const char *name,
return;
}
- cpu->sve_vq.map = deposit32(cpu->sve_vq.map, vq - 1, 1, value);
- cpu->sve_vq.init |= 1 << (vq - 1);
+ vq_map->map = deposit32(vq_map->map, vq - 1, 1, value);
+ vq_map->init |= 1 << (vq - 1);
}
static bool cpu_arm_get_sve(Object *obj, Error **errp)
@@ -691,6 +691,7 @@ static void cpu_arm_get_sve_default_vec_len(Object *obj,
Visitor *v,
void aarch64_add_sve_properties(Object *obj)
{
+ ARMCPU *cpu = ARM_CPU(obj);
uint32_t vq;
object_property_add_bool(obj, "sve", cpu_arm_get_sve, cpu_arm_set_sve);
@@ -698,8 +699,8 @@ void aarch64_add_sve_properties(Object *obj)
for (vq = 1; vq <= ARM_MAX_VQ; ++vq) {
char name[8];
sprintf(name, "sve%d", vq * 128);
- object_property_add(obj, name, "bool", cpu_arm_get_sve_vq,
- cpu_arm_set_sve_vq, NULL, NULL);
+ object_property_add(obj, name, "bool", cpu_arm_get_vq,
+ cpu_arm_set_vq, NULL, &cpu->sve_vq);
}
#ifdef CONFIG_USER_ONLY
--
2.34.1
- [PATCH v3 04/51] target/arm: Add ARM_CP_SME, (continued)
- [PATCH v3 04/51] target/arm: Add ARM_CP_SME, Richard Henderson, 2022/06/20
- [PATCH v3 06/51] target/arm: Add SMCR_ELx, Richard Henderson, 2022/06/20
- [PATCH v3 10/51] target/arm: Implement SMSTART, SMSTOP, Richard Henderson, 2022/06/20
- [PATCH v3 08/51] target/arm: Add PSTATE.{SM,ZA} to TB flags, Richard Henderson, 2022/06/20
- [PATCH v3 09/51] target/arm: Add the SME ZA storage to CPUARMState, Richard Henderson, 2022/06/20
- [PATCH v3 11/51] target/arm: Move error for sve%d property to arm_cpu_sve_finalize, Richard Henderson, 2022/06/20
- [PATCH v3 12/51] target/arm: Create ARMVQMap, Richard Henderson, 2022/06/20
- [PATCH v3 14/51] target/arm: Generalize cpu_arm_{get, set}_default_vec_len, Richard Henderson, 2022/06/20
- [PATCH v3 16/51] target/arm: Unexport aarch64_add_*_properties, Richard Henderson, 2022/06/20
- [PATCH v3 13/51] target/arm: Generalize cpu_arm_{get,set}_vq,
Richard Henderson <=
- [PATCH v3 17/51] target/arm: Add cpu properties for SME, Richard Henderson, 2022/06/20
- [PATCH v3 19/51] target/arm: Add SVL to TB flags, Richard Henderson, 2022/06/20
- [PATCH v3 20/51] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h, Richard Henderson, 2022/06/20
- [PATCH v3 18/51] target/arm: Introduce sve_vqm1_for_el_sm, Richard Henderson, 2022/06/20
- [PATCH v3 22/51] target/arm: Trap AdvSIMD usage when Streaming SVE is active, Richard Henderson, 2022/06/20