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Re: [PATCH v3 29/51] target/arm: Implement SME ADDHA, ADDVA
From: |
Peter Maydell |
Subject: |
Re: [PATCH v3 29/51] target/arm: Implement SME ADDHA, ADDVA |
Date: |
Thu, 23 Jun 2022 13:04:49 +0100 |
On Mon, 20 Jun 2022 at 19:09, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/arm/helper-sme.h | 5 +++
> target/arm/sme.decode | 11 +++++
> target/arm/sme_helper.c | 90 ++++++++++++++++++++++++++++++++++++++
> target/arm/translate-sme.c | 30 +++++++++++++
> 4 files changed, 136 insertions(+)
> #undef DO_ST
> +
> +void HELPER(sme_addha_s)(void *vzda, void *vzn, void *vpn,
> + void *vpm, uint32_t desc)
> +{
> + intptr_t row, col, oprsz = simd_oprsz(desc) / 4;
> + uint64_t *pn = vpn, *pm = vpm;
> + uint32_t * restrict zda = vzda, * restrict zn = vzn;
We use 'restrict' pointers nowhere else in the codebase, and
I would prefer not to introduce them purely for that reason...
-- PMM
- [PATCH v3 20/51] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h, (continued)
[PATCH v3 28/51] target/arm: Implement SME LDR, STR, Richard Henderson, 2022/06/20
[PATCH v3 29/51] target/arm: Implement SME ADDHA, ADDVA, Richard Henderson, 2022/06/20
- Re: [PATCH v3 29/51] target/arm: Implement SME ADDHA, ADDVA,
Peter Maydell <=
[PATCH v3 30/51] target/arm: Implement FMOPA, FMOPS (non-widening), Richard Henderson, 2022/06/20
[PATCH v3 38/51] target/arm: Enable SME for -cpu max, Richard Henderson, 2022/06/20
[PATCH v3 21/51] target/arm: Add infrastructure for disas_sme, Richard Henderson, 2022/06/20
[PATCH v3 23/51] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL, Richard Henderson, 2022/06/20