Re: [PATCH 04/15] target/arm: Implement VSCCLRM insn

[Richard Henderson]

On 11/16/20 8:08 AM, Peter Maydell wrote:
> +    aspen = load_cpu_field(v7m.fpccr[M_REG_S]);
> +    sfpa = load_cpu_field(v7m.control[M_REG_S]);
> +    tcg_gen_andi_i32(aspen, aspen, R_V7M_FPCCR_ASPEN_MASK);
> +    tcg_gen_subi_i32(aspen, aspen, R_V7M_FPCCR_ASPEN_MASK);

xori would be clearer, i think.

> +    /* Zero the Sregs from btmreg to topreg inclusive. */
> +    zero64 = tcg_const_i64(0);
> +    zero32 = tcg_const_i32(0);
> +    if (btmreg & 1) {
> +        write_neon_element32(zero32, btmreg >> 1, 1, MO_32);
> +        btmreg++;
> +    }
> +    for (; btmreg + 1 <= topreg; btmreg += 2) {
> +        write_neon_element64(zero64, btmreg >> 1, 0, MO_64);
> +    }
> +    if (btmreg == topreg) {
> +        write_neon_element32(zero32, btmreg >> 1, 0, MO_32);
> +        btmreg++;
> +    }

I hadn't implemented MO_32 for write_neon_element64 because there were no
users.  Better to just add the case there using tcg_gen_st32_i64, then you
don't need a 32-bit zero.

Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~