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Re: [PATCH 09/10] target/arm: Implement FPSCR.LTPSIZE for M-profile LOB
From: |
Richard Henderson |
Subject: |
Re: [PATCH 09/10] target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension |
Date: |
Tue, 13 Oct 2020 14:01:51 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 10/13/20 1:38 PM, Peter Maydell wrote:
> * has short-vector support (eg Cortex-A9)
> * v8A, can implement FPSCR.{Stride,Len} as RAZ/WI
> * no short-vector support, Stride/Len can be written
> but the only effect is that some insns must UNDEF
> (eg Cortex-A7)
Yep.
The other thing I wondered is if it was worthwhile to go ahead and split out
ltpsize now, even with MTE not implemented.
Eventually the conditions here would look like
if (m-profile) {
if (mte) {
ltpsize = [18:16];
}
} else {
if (!v8) {
vec_len = [18:16];
vec_stride = [22:20];
}
}
but for now you could leave out the assignment to ltpsize and just leave it
initialized to 4 since reset.
r~
[PATCH 03/10] target/arm: Implement v8.1M conditional-select insns, Peter Maydell, 2020/10/12
[PATCH 09/10] target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension, Peter Maydell, 2020/10/12
[PATCH 05/10] target/arm: Don't allow BLX imm for M-profile, Peter Maydell, 2020/10/12
[PATCH 08/10] target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile, Peter Maydell, 2020/10/12
[PATCH 04/10] target/arm: Make the t32 insn[25:23]=111 group non-overlapping, Peter Maydell, 2020/10/12
[PATCH 06/10] target/arm: Implement v8.1M branch-future insns (as NOPs), Peter Maydell, 2020/10/12
[PATCH 10/10] target/arm: Fix writing to FPSCR.FZ16 on M-profile, Peter Maydell, 2020/10/12