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Re: [PATCH 05/13] target/arm: Add and use FIELD definitions for ID_AA64D
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH 05/13] target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1 |
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Date: |
Tue, 11 Feb 2020 10:34:06 -0800 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 |
On 2/11/20 9:37 AM, Peter Maydell wrote:
> if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
> - assert(extract32(cpu->id_aa64dfr0, 12, 4) == brps);
> - assert(extract32(cpu->id_aa64dfr0, 20, 4) == wrps);
> - assert(extract32(cpu->id_aa64dfr0, 28, 4) == ctx_cmps);
> + assert(FIELD_EX32(cpu->id_aa64dfr0, ID_AA64DFR0, BRPS) == brps);
> + assert(FIELD_EX32(cpu->id_aa64dfr0, ID_AA64DFR0, WRPS) == wrps);
> + assert(FIELD_EX32(cpu->id_aa64dfr0, ID_AA64DFR0, CTX_CMPS) ==
> ctx_cmps);
Should really be FIELD_EX64. Otherwise,
Reviewed-by: Richard Henderson <address@hidden>
r~
- [PATCH 02/13] target/arm: Add isar_feature_any_fp16 and document naming/usage conventions, (continued)
- [PATCH 02/13] target/arm: Add isar_feature_any_fp16 and document naming/usage conventions, Peter Maydell, 2020/02/11
- [PATCH 06/13] target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON field, Peter Maydell, 2020/02/11
- [PATCH 09/13] target/arm: Implement ARMv8.1-PMU extension, Peter Maydell, 2020/02/11
- [PATCH 05/13] target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1, Peter Maydell, 2020/02/11
- Re: [PATCH 05/13] target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1,
Richard Henderson <=
- [PATCH 01/13] target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registers, Peter Maydell, 2020/02/11
- [PATCH 11/13] target/arm: Provide ARMv8.4-PMU in '-cpu max', Peter Maydell, 2020/02/11
- [PATCH 08/13] target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checks, Peter Maydell, 2020/02/11
- [PATCH 04/13] target/arm: Factor out PMU register definitions, Peter Maydell, 2020/02/11