Analog parameter in MoCMOS technology.

[Dmitry . Nadezhin]

Hi Pierce,

I just commited changes to Electric CVS repository.
I hope that they pass the regressions, and Steve will send them to you soon.

MoCMOS tehnology will have one parameter "Analog" which represents MOSIS SCNA.
According to MOSIS this parameter is valid only when
 MOSISRuleSet == SCMOS && NumMetals=2 && isSecondPoly == 2 && DisallowStackVias 
== 2 .

This parameter enables "mocmos:P-Base" layer and "mocmos:NPN-Transistor" node 
for MOSIS SCNA rules.
The display of "mocmos:P-base" layer is the same as of  "bicmos:P_Base_Active" 
one. If you are not satisfy with it,
please edit the appropriate place in "technology.technologies.MoCMOS" file.

This "mocmos:NPN-Transistor" node consists of PBase box with Emitter and Base 
regions which is surrounded by Collector perimeter.
It is scalable, and it doesn't contain contacts to substrate ground and other 
metal wiring which I found in your library.
All its cuts have exact size 2x2 .

As you don't want to scale NPN-transistor you can create a fixed-size Cell 
which consists of the "NPN-Transistor"
primitive and of the wiring.

The minimal size of this node is 30x22 (both Base and Emitter consist of a 
single cut).
If its size is 20x26 then it has two-cut Base and Emitter and I hope that this 
matches your library.

I used "tecEdit" package as a technology dumper for regressions last time.
Perhaps, "tecEdit" in CVS code is buggy now, when used as an editor.
I guess that it is simpler to edit "P-Base" and "NPN-Transistor" code in
"com/sun/electric/technology/technologies/MoCMOS.java" and in
"com/sun/electric/technology/technologies/utils/Mosis180.xml".
Don't afraid "180", this xml file still contains lambda rules for scalable 
Mosis.

Please, keep me informed about issues you find in 8.05.

  -Dima

----- Original Message -----
From: Pierce Keating <address@hidden>
Date: Tuesday, April 24, 2007 2:33 am
Subject: Re: issues with technology editing in version 7

> Hi Dima,
>   
>  I just sent the signed copies of legalese to Steve, so I plan to 
> start working in 8.05 as soon as I can. 
>   
>  With respect to the npn scaling, I wasn't planning to scale the 
> npn transistors because I can't predict what the spice models would 
> be (NPN's vary greatly with different layouts). I have information 
> from AMI that provides SPICE models for a given npn transistor 
> geometry, so I was just going to stick as close to that as possible.
>   
>  Yes, I noticed that I'm stuck with the SUBM rules as well. I 
> started changing them in the existing techology - not sure whether 
> I would pull the plug and start over again. I assume that when I 
> converted the mocmos technology for editiing, if had set the rules 
> to be SCMOS, that the new library would be set to those rules? I 
> guess I'll be starting over again in 8.05, so I'll be sure to check 
> for it then.
>   
>  Yes, I also noticed the "exact" wording in the SCMOS active cut 
> rules as well. The AMI npn layout seens to have non-square cuts, so 
> wasn't sure what I was going to do. Maybe it's safest to make them 
> all square.
>   
>  Thanks very much for your questions.
>   
>  Pierce