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Re: [avr-libc-dev] Re: gcc's avr implementation does not appear to be in
Re: [avr-libc-dev] Re: gcc's avr implementation does not appear to be interrupt safe!
Wed, 19 Jan 2005 11:07:45 -0800
> Paul Schlie wrote:
> >Hey guys, just to give you a heads up, as there are routines implemented
> >in both avr.c and avr.md that temporarily utilize r1 without disabling
> > interrupts around these sections;
> >any code which may be invoked subsequent
> >to an interrupt not resuming execution at the point of interruption (which
> >includes all interrupt and/or task code invoked by simple interrupt driven
> >multi-tasking kernels) may not safely assume r1=0.
> >The only reasonable solution to this problem that I see is to remove the
> >presumption that r1 == 0, and let the complier allocate what ever values it
> >deems necessary to generate efficient code; as otherwise the requirement to
> >block interrupts around these otherwise critical sections doesn't seem like
> >a good idea, as it's neither efficient code-wise, or helpful minimizing
> >interrupt latencies. (the compiler will tend to allocate and maintain any
> >frequently required value, the avr port should likely just let the compiler
> >do it's job).
> >This affects any asm code in libc which presumes r1 == 0, and would need
> >to be corrected to simply define a local 0 value register if required.
> >(now that I think of it, to my vague recollection, I recall that stack
> > pointer manipulation may also not be interrupt save, but haven't checked
> > the code yet)
Maybe I'm missing something, but it seems to me that any multitasking
system is required to preserve most, if not all, registers when changing
context. This would include R1. I don't think context switch code should
be making assumptions about register usage.