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[Stable-7.2.15 22/33] target/arm: Don't assert in regime_is_user() for E
From: |
Michael Tokarev |
Subject: |
[Stable-7.2.15 22/33] target/arm: Don't assert in regime_is_user() for E10 mmuidx values |
Date: |
Sat, 9 Nov 2024 09:38:48 +0300 |
From: Peter Maydell <peter.maydell@linaro.org>
In regime_is_user() we assert if we're passed an ARMMMUIdx_E10_*
mmuidx value. This used to make sense because we only used this
function in ptw.c and would never use it on this kind of stage 1+2
mmuidx, only for an individual stage 1 or stage 2 mmuidx.
However, when we implemented FEAT_E0PD we added a callsite in
aa64_va_parameters(), which means this can now be called for
stage 1+2 mmuidx values if the guest sets the TCG_ELX.{E0PD0,E0PD1}
bits to enable use of the feature. This will then result in
an assertion failure later, for instance on a TLBI operation:
#6 0x00007ffff6d0e70f in g_assertion_message_expr
(domain=0x0, file=0x55555676eeba "../../target/arm/internals.h", line=978,
func=0x555556771d48 <__func__.5> "regime_is_user", expr=<optimised out>)
at ../../../glib/gtestutils.c:3279
#7 0x0000555555f286d2 in regime_is_user (env=0x555557f2fe00,
mmu_idx=ARMMMUIdx_E10_0) at ../../target/arm/internals.h:978
#8 0x0000555555f3e31c in aa64_va_parameters (env=0x555557f2fe00,
va=18446744073709551615, mmu_idx=ARMMMUIdx_E10_0, data=true, el1_is_aa32=false)
at ../../target/arm/helper.c:12048
#9 0x0000555555f3163b in tlbi_aa64_get_range (env=0x555557f2fe00,
mmuidx=ARMMMUIdx_E10_0, value=106721347371041) at ../../target/arm/helper.c:5214
#10 0x0000555555f317e8 in do_rvae_write (env=0x555557f2fe00,
value=106721347371041, idxmap=21, synced=true) at ../../target/arm/helper.c:5260
#11 0x0000555555f31925 in tlbi_aa64_rvae1is_write (env=0x555557f2fe00,
ri=0x555557fbeae0, value=106721347371041) at ../../target/arm/helper.c:5302
#12 0x0000555556036f8f in helper_set_cp_reg64 (env=0x555557f2fe00,
rip=0x555557fbeae0, value=106721347371041) at
../../target/arm/tcg/op_helper.c:965
Since we do know whether these mmuidx values are for usermode
or not, we can easily make regime_is_user() handle them:
ARMMMUIdx_E10_0 is user, and the other two are not.
Cc: qemu-stable@nongnu.org
Fixes: e4c93e44ab103f ("target/arm: Implement FEAT_E0PD")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20241017172331.822587-1-peter.maydell@linaro.org
(cherry picked from commit 1505b651fdbd9af59a4a90876a62ae7ea2d4cd39)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 3c7ff51c99..bdd89ae21e 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -723,6 +723,7 @@ static inline uint32_t regime_el(CPUARMState *env,
ARMMMUIdx mmu_idx)
static inline bool regime_is_user(CPUARMState *env, ARMMMUIdx mmu_idx)
{
switch (mmu_idx) {
+ case ARMMMUIdx_E10_0:
case ARMMMUIdx_E20_0:
case ARMMMUIdx_Stage1_E0:
case ARMMMUIdx_MUser:
@@ -732,10 +733,6 @@ static inline bool regime_is_user(CPUARMState *env,
ARMMMUIdx mmu_idx)
return true;
default:
return false;
- case ARMMMUIdx_E10_0:
- case ARMMMUIdx_E10_1:
- case ARMMMUIdx_E10_1_PAN:
- g_assert_not_reached();
}
}
--
2.39.5
- [Stable-7.2.15 16/33] target/i386: Avoid unreachable variable declaration in mmu_translate(), (continued)
- [Stable-7.2.15 16/33] target/i386: Avoid unreachable variable declaration in mmu_translate(), Michael Tokarev, 2024/11/09
- [Stable-7.2.15 15/33] tcg: Reset data_gen_ptr correctly, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 17/33] target/i386: Walk NPT in guest real mode, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 18/33] linux-user/ppc: Fix sigmask endianness issue in sigreturn, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 21/33] net/tap-win32: Fix gcc 14 format truncation errors, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 19/33] gitlab: make check-[dco|patch] a little more verbose, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 20/33] Fix calculation of minimum in colo_compare_tcp, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 25/33] hw/intc: Don't clear pending bits on IRQ lowering, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 22/33] target/arm: Don't assert in regime_is_user() for E10 mmuidx values,
Michael Tokarev <=
- [Stable-7.2.15 26/33] target/riscv: Set vtype.vill on CPU reset, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 23/33] target/riscv/csr.c: Fix an access to VXSAT, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 29/33] target/riscv: Fix vcompress with rvv_ta_all_1s, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 24/33] target/riscv: Correct SXL return value for RV32 in RV64 QEMU, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 28/33] hw/intc/riscv_aplic: Check and update pending when write sourcecfg, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 30/33] target/ppc: Set ctx->opcode for decode_insn32(), Michael Tokarev, 2024/11/09
- [Stable-7.2.15 32/33] hw/nvme: fix handling of over-committed queues, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 27/33] hw/intc/riscv_aplic: Fix in_clrip[x] read emulation, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 33/33] 9pfs: fix crash on 'Treaddir' request, Michael Tokarev, 2024/11/09
- [Stable-7.2.15 31/33] target/arm: Fix SVE SDOT/UDOT/USDOT (4-way, indexed), Michael Tokarev, 2024/11/09