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[Stable-9.0.1 59/71] target/riscv: rvv: Check single width operator for
From: |
Michael Tokarev |
Subject: |
[Stable-9.0.1 59/71] target/riscv: rvv: Check single width operator for vfncvt.rod.f.f.w |
Date: |
Fri, 7 Jun 2024 22:13:40 +0300 |
From: Max Chou <max.chou@sifive.com>
The opfv_narrow_check needs to check the single width float operator by
require_rvf.
Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-stable <qemu-stable@nongnu.org>
Message-ID: <20240322092600.1198921-4-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
(cherry picked from commit 692f33a3abcaae789b08623e7cbdffcd2c738c89)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
b/target/riscv/insn_trans/trans_rvv.c.inc
index 6cb9bc9fde..19059fea5f 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -2817,6 +2817,7 @@ static bool opffv_narrow_check(DisasContext *s, arg_rmr
*a)
static bool opffv_rod_narrow_check(DisasContext *s, arg_rmr *a)
{
return opfv_narrow_check(s, a) &&
+ require_rvf(s) &&
require_scale_rvf(s) &&
(s->sew != MO_8);
}
--
2.39.2
- [Stable-9.0.1 49/71] target/arm: Disable SVE extensions when SVE is disabled, (continued)
- [Stable-9.0.1 49/71] target/arm: Disable SVE extensions when SVE is disabled, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 50/71] qio: Inherit follow_coroutine_ctx across TLS, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 51/71] iotests: test NBD+TLS+iothread, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 52/71] hw/intc/riscv_aplic: APLICs should add child earlier than realize, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 53/71] target/riscv/kvm: Fix exposure of Zkr, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 54/71] target/riscv/kvm: tolerate KVM disable ext errors, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 55/71] target/riscv: Fix the element agnostic function problem, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 56/71] target/riscv/cpu.c: fix Zvkb extension config, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 57/71] target/riscv: rvv: Fix Zvfhmin checking for vfwcvt.f.f.v and vfncvt.f.f.w instructions, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 58/71] target/riscv: rvv: Check single width operator for vector fp widen instructions, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 59/71] target/riscv: rvv: Check single width operator for vfncvt.rod.f.f.w,
Michael Tokarev <=
- [Stable-9.0.1 60/71] target/riscv: rvv: Remove redudant SEW checking for vector fp narrow/widen instructions, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 61/71] target/riscv: prioritize pmp errors in raise_mmu_exception(), Michael Tokarev, 2024/06/07
- [Stable-9.0.1 62/71] target/riscv: do not set mtval2 for non guest-page faults, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 63/71] target/riscv: rvzicbo: Fixup CBO extension register calculation, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 64/71] target/riscv/kvm.c: Fix the hart bit setting of AIA, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 65/71] riscv, gdbstub.c: fix reg_width in ricsv_gen_dynamic_vector_feature(), Michael Tokarev, 2024/06/07
- [Stable-9.0.1 66/71] disas/riscv: Decode all of the pmpcfg and pmpaddr CSRs, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 67/71] target/i386: fix xsave.flat from kvm-unit-tests, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 68/71] target/i386: fix SSE and SSE2 feature check, Michael Tokarev, 2024/06/07
- [Stable-9.0.1 69/71] virtio-gpu: fix v2 migration, Michael Tokarev, 2024/06/07