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[PULL 29/36] hw/scsi/esp-pci: use correct address register for PCI DMA t
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 29/36] hw/scsi/esp-pci: use correct address register for PCI DMA transfers |
Date: |
Fri, 19 Jan 2024 12:34:58 +0100 |
From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
The current code in esp_pci_dma_memory_rw() sets the DMA address to the value
of the DMA_SPA (Starting Physical Address) register which is incorrect: this
means that for each callback from the SCSI layer the DMA address is set back
to the starting address.
In the case where only a single SCSI callback occurs (currently for transfer
lengths < 128kB) this works fine, however for larger transfers the DMA address
wraps back to the initial starting address, corrupting the buffer holding the
data transferred to the guest.
Fix esp_pci_dma_memory_rw() to use the DMA_WAC (Working Address Counter) for
the DMA address which is correctly incremented across multiple SCSI layer
transfers.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Message-ID: <20240112131529.515642-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/scsi/esp-pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c
index 93b3429e0f..7117725371 100644
--- a/hw/scsi/esp-pci.c
+++ b/hw/scsi/esp-pci.c
@@ -275,7 +275,7 @@ static void esp_pci_dma_memory_rw(PCIESPState *pci, uint8_t
*buf, int len,
qemu_log_mask(LOG_UNIMP, "am53c974: MDL transfer not implemented\n");
}
- addr = pci->dma_regs[DMA_SPA];
+ addr = pci->dma_regs[DMA_WAC];
if (pci->dma_regs[DMA_WBC] < len) {
len = pci->dma_regs[DMA_WBC];
}
--
2.41.0
- [PULL 19/36] hw/pflash: use ldn_{be,le}_p and stn_{be,le}_p, (continued)
- [PULL 19/36] hw/pflash: use ldn_{be,le}_p and stn_{be,le}_p, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 20/36] hw/pflash: implement update buffer for block writes, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 21/36] system/replay: Restrict icount to system emulation, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 22/36] system/watchpoint: Move TCG specific code to accel/tcg/, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 23/36] cpus: Restrict 'start-powered-off' property to system emulation, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 24/36] accel: Rename accel_init_ops_interfaces() to include 'system', Philippe Mathieu-Daudé, 2024/01/19
- [PULL 25/36] hw/core/cpu: Rename cpu_class_init() to include 'common', Philippe Mathieu-Daudé, 2024/01/19
- [PULL 26/36] hw/s390x: Rename cpu_class_init() to include 'sclp', Philippe Mathieu-Daudé, 2024/01/19
- [PULL 27/36] target/i386: Rename tcg_cpu_FOO() to include 'x86', Philippe Mathieu-Daudé, 2024/01/19
- [PULL 28/36] target/riscv: Rename tcg_cpu_FOO() to include 'riscv', Philippe Mathieu-Daudé, 2024/01/19
- [PULL 29/36] hw/scsi/esp-pci: use correct address register for PCI DMA transfers,
Philippe Mathieu-Daudé <=
- [PULL 30/36] hw/scsi/esp-pci: generate PCI interrupt from separate ESP and PCI sources, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 31/36] hw/scsi/esp-pci: synchronise setting of DMA_STAT_DONE with ESP completion interrupt, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 32/36] hw/scsi/esp-pci: set DMA_STAT_BCMBLT when BLAST command issued, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 33/36] hw/elf_ops: Ignore loadable segments with zero size, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 34/36] MAINTAINERS: Update Raphael Norwitz email, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 35/36] MAINTAINERS: Update hw/core/cpu.c entry, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 36/36] configure: Add linux header compile support for LoongArch, Philippe Mathieu-Daudé, 2024/01/19
- Re: [PULL 00/36] HW core patches for 2024-01-19, Peter Maydell, 2024/01/19