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[PULL 25/36] hw/core/cpu: Rename cpu_class_init() to include 'common'
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 25/36] hw/core/cpu: Rename cpu_class_init() to include 'common' |
Date: |
Fri, 19 Jan 2024 12:34:54 +0100 |
cpu_class_init() is common, so rename it as cpu_common_class_init()
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20240111120221.35072-3-philmd@linaro.org>
---
hw/core/cpu-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
index 3ccfe882e2..67db07741d 100644
--- a/hw/core/cpu-common.c
+++ b/hw/core/cpu-common.c
@@ -273,7 +273,7 @@ static int64_t cpu_common_get_arch_id(CPUState *cpu)
return cpu->cpu_index;
}
-static void cpu_class_init(ObjectClass *klass, void *data)
+static void cpu_common_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ResettableClass *rc = RESETTABLE_CLASS(klass);
@@ -304,7 +304,7 @@ static const TypeInfo cpu_type_info = {
.instance_finalize = cpu_common_finalize,
.abstract = true,
.class_size = sizeof(CPUClass),
- .class_init = cpu_class_init,
+ .class_init = cpu_common_class_init,
};
static void cpu_register_types(void)
--
2.41.0
- [PULL 15/36] target/sh4: Deprecate the shix machine, (continued)
- [PULL 15/36] target/sh4: Deprecate the shix machine, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 16/36] hw/block: Deprecate the TC58128 block device, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 17/36] hw/i386/pc_piix: Make piix_intx_routing_notifier_xen() more device independent, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 18/36] hw/pflash: refactor pflash_data_write(), Philippe Mathieu-Daudé, 2024/01/19
- [PULL 19/36] hw/pflash: use ldn_{be,le}_p and stn_{be,le}_p, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 20/36] hw/pflash: implement update buffer for block writes, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 21/36] system/replay: Restrict icount to system emulation, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 22/36] system/watchpoint: Move TCG specific code to accel/tcg/, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 23/36] cpus: Restrict 'start-powered-off' property to system emulation, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 24/36] accel: Rename accel_init_ops_interfaces() to include 'system', Philippe Mathieu-Daudé, 2024/01/19
- [PULL 25/36] hw/core/cpu: Rename cpu_class_init() to include 'common',
Philippe Mathieu-Daudé <=
- [PULL 26/36] hw/s390x: Rename cpu_class_init() to include 'sclp', Philippe Mathieu-Daudé, 2024/01/19
- [PULL 27/36] target/i386: Rename tcg_cpu_FOO() to include 'x86', Philippe Mathieu-Daudé, 2024/01/19
- [PULL 28/36] target/riscv: Rename tcg_cpu_FOO() to include 'riscv', Philippe Mathieu-Daudé, 2024/01/19
- [PULL 29/36] hw/scsi/esp-pci: use correct address register for PCI DMA transfers, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 30/36] hw/scsi/esp-pci: generate PCI interrupt from separate ESP and PCI sources, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 31/36] hw/scsi/esp-pci: synchronise setting of DMA_STAT_DONE with ESP completion interrupt, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 32/36] hw/scsi/esp-pci: set DMA_STAT_BCMBLT when BLAST command issued, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 33/36] hw/elf_ops: Ignore loadable segments with zero size, Philippe Mathieu-Daudé, 2024/01/19
- [PULL 34/36] MAINTAINERS: Update Raphael Norwitz email, Philippe Mathieu-Daudé, 2024/01/19