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[PATCH v4 28/57] tcg/mips: Use full load/store helpers in user-only mode
From: |
Richard Henderson |
Subject: |
[PATCH v4 28/57] tcg/mips: Use full load/store helpers in user-only mode |
Date: |
Wed, 3 May 2023 08:06:27 +0100 |
Instead of using helper_unaligned_{ld,st}, use the full load/store helpers.
This will allow the fast path to increase alignment to implement atomicity
while not immediately raising an alignment exception.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/mips/tcg-target.c.inc | 57 ++-------------------------------------
1 file changed, 2 insertions(+), 55 deletions(-)
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index 7770ef46bd..fa0f334e8d 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -1075,7 +1075,6 @@ static void tcg_out_call(TCGContext *s, const
tcg_insn_unit *arg,
tcg_out_nop(s);
}
-#if defined(CONFIG_SOFTMMU)
/* We have four temps, we might as well expose three of them. */
static const TCGLdstHelperParam ldst_helper_param = {
.ntmp = 3, .tmp = { TCG_TMP0, TCG_TMP1, TCG_TMP2 }
@@ -1088,8 +1087,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s,
TCGLabelQemuLdst *l)
/* resolve label address */
if (!reloc_pc16(l->label_ptr[0], tgt_rx)
- || (TCG_TARGET_REG_BITS < TARGET_LONG_BITS
- && !reloc_pc16(l->label_ptr[1], tgt_rx))) {
+ || (l->label_ptr[1] && !reloc_pc16(l->label_ptr[1], tgt_rx))) {
return false;
}
@@ -1118,8 +1116,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s,
TCGLabelQemuLdst *l)
/* resolve label address */
if (!reloc_pc16(l->label_ptr[0], tgt_rx)
- || (TCG_TARGET_REG_BITS < TARGET_LONG_BITS
- && !reloc_pc16(l->label_ptr[1], tgt_rx))) {
+ || (l->label_ptr[1] && !reloc_pc16(l->label_ptr[1], tgt_rx))) {
return false;
}
@@ -1139,56 +1136,6 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s,
TCGLabelQemuLdst *l)
return true;
}
-#else
-static bool tcg_out_fail_alignment(TCGContext *s, TCGLabelQemuLdst *l)
-{
- void *target;
-
- if (!reloc_pc16(l->label_ptr[0], tcg_splitwx_to_rx(s->code_ptr))) {
- return false;
- }
-
- if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
- /* A0 is env, A1 is skipped, A2:A3 is the uint64_t address. */
- TCGReg a2 = MIPS_BE ? l->addrhi_reg : l->addrlo_reg;
- TCGReg a3 = MIPS_BE ? l->addrlo_reg : l->addrhi_reg;
-
- if (a3 != TCG_REG_A2) {
- tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_A2, a2);
- tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_A3, a3);
- } else if (a2 != TCG_REG_A3) {
- tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_A3, a3);
- tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_A2, a2);
- } else {
- tcg_out_mov(s, TCG_TYPE_I32, TCG_TMP0, TCG_REG_A2);
- tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_A2, TCG_REG_A3);
- tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_A3, TCG_TMP0);
- }
- } else {
- tcg_out_mov(s, TCG_TYPE_TL, TCG_REG_A1, l->addrlo_reg);
- }
- tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_A0, TCG_AREG0);
-
- /*
- * Tail call to the helper, with the return address back inline.
- * We have arrived here via BNEL, so $31 is already set.
- */
- target = (l->is_ld ? helper_unaligned_ld : helper_unaligned_st);
- tcg_out_call_int(s, target, true);
- return true;
-}
-
-static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
-{
- return tcg_out_fail_alignment(s, l);
-}
-
-static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
-{
- return tcg_out_fail_alignment(s, l);
-}
-#endif /* SOFTMMU */
-
typedef struct {
TCGReg base;
MemOp align;
--
2.34.1
- Re: [PATCH v4 24/57] tcg/loongarch64: Use full load/store helpers in user-only mode, (continued)
- [PATCH v4 25/57] tcg/riscv: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/03
- [PATCH v4 26/57] tcg/arm: Adjust constraints on qemu_ld/st, Richard Henderson, 2023/05/03
- [PATCH v4 27/57] tcg/arm: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/03
- [PATCH v4 29/57] tcg/s390x: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/03
- [PATCH v4 28/57] tcg/mips: Use full load/store helpers in user-only mode,
Richard Henderson <=
- [PATCH v4 31/57] tcg/sparc64: Rename tcg_out_movi_imm13 to tcg_out_movi_s13, Richard Henderson, 2023/05/03
- [PATCH v4 30/57] tcg/sparc64: Allocate %g2 as a third temporary, Richard Henderson, 2023/05/03
[PATCH v4 32/57] tcg/sparc64: Rename tcg_out_movi_imm32 to tcg_out_movi_u32, Richard Henderson, 2023/05/03