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[PATCH v1 08/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (
From: |
David Hildenbrand |
Subject: |
[PATCH v1 08/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR |
Date: |
Wed, 30 Sep 2020 16:55:11 +0200 |
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/helper.h | 4 +++
target/s390x/translate_vx.c.inc | 38 +++++++++++++++-----
target/s390x/vec_fpu_helper.c | 64 +++++++++++++++++++--------------
3 files changed, 72 insertions(+), 34 deletions(-)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index ab41555764..6bf4d3e7d0 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -252,8 +252,12 @@ DEF_HELPER_FLAGS_5(gvec_vfa32s, TCG_CALL_NO_WG, void, ptr,
cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfa64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfa64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env,
i32)
DEF_HELPER_FLAGS_5(gvec_vfa128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env,
i32)
+DEF_HELPER_4(gvec_wfc32, void, cptr, cptr, env, i32)
+DEF_HELPER_4(gvec_wfk32, void, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_wfc64, void, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_wfk64, void, cptr, cptr, env, i32)
+DEF_HELPER_4(gvec_wfc128, void, cptr, cptr, env, i32)
+DEF_HELPER_4(gvec_wfk128, void, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfce64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env,
i32)
DEF_HELPER_FLAGS_5(gvec_vfce64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env,
i32)
DEF_HELPER_5(gvec_vfce64_cc, void, ptr, cptr, cptr, env, i32)
diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.inc
index 91d4e74a68..cc745784e5 100644
--- a/target/s390x/translate_vx.c.inc
+++ b/target/s390x/translate_vx.c.inc
@@ -2601,19 +2601,41 @@ static DisasJumpType op_wfc(DisasContext *s, DisasOps
*o)
{
const uint8_t fpf = get_field(s, m3);
const uint8_t m4 = get_field(s, m4);
+ gen_helper_gvec_2_ptr *fn = NULL;
- if (fpf != FPF_LONG || m4) {
+ switch (fpf) {
+ case FPF_SHORT:
+ if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
+ fn = gen_helper_gvec_wfk32;
+ if (s->fields.op2 == 0xcb) {
+ fn = gen_helper_gvec_wfc32;
+ }
+ }
+ break;
+ case FPF_LONG:
+ fn = gen_helper_gvec_wfk64;
+ if (s->fields.op2 == 0xcb) {
+ fn = gen_helper_gvec_wfc64;
+ }
+ break;
+ case FPF_EXT:
+ if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
+ fn = gen_helper_gvec_wfk128;
+ if (s->fields.op2 == 0xcb) {
+ fn = gen_helper_gvec_wfc128;
+ }
+ }
+ break;
+ default:
+ break;
+ };
+
+ if (!fn || m4) {
gen_program_exception(s, PGM_SPECIFICATION);
return DISAS_NORETURN;
}
- if (s->fields.op2 == 0xcb) {
- gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2),
- cpu_env, 0, gen_helper_gvec_wfc64);
- } else {
- gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2),
- cpu_env, 0, gen_helper_gvec_wfk64);
- }
+ gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env, 0, fn);
set_cc_static(s);
return DISAS_NEXT;
}
diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c
index 799e7f793e..1b78b6c088 100644
--- a/target/s390x/vec_fpu_helper.c
+++ b/target/s390x/vec_fpu_helper.c
@@ -183,37 +183,49 @@ void HELPER(gvec_vfa##BITS##s)(void *v1, const void *v2,
const void *v3, \
DEF_GVEC_FVA_S(32)
DEF_GVEC_FVA_S(64)
-static int wfc64(const S390Vector *v1, const S390Vector *v2,
- CPUS390XState *env, bool signal, uintptr_t retaddr)
-{
- /* only the zero-indexed elements are compared */
- const float64 a = s390_vec_read_element64(v1, 0);
- const float64 b = s390_vec_read_element64(v2, 0);
- uint8_t vxc, vec_exc = 0;
- int cmp;
-
- if (signal) {
- cmp = float64_compare(a, b, &env->fpu_status);
- } else {
- cmp = float64_compare_quiet(a, b, &env->fpu_status);
- }
- vxc = check_ieee_exc(env, 0, false, &vec_exc);
- handle_ieee_exc(env, vxc, vec_exc, retaddr);
-
- return float_comp_to_cc(env, cmp);
+#define DEF_WFC(BITS)
\
+static int wfc##BITS(const S390Vector *v1, const S390Vector *v2,
\
+ CPUS390XState *env, bool signal, uintptr_t retaddr)
\
+{
\
+ /* only the zero-indexed elements are compared */
\
+ const float##BITS a = s390_vec_read_float##BITS(v1, 0);
\
+ const float##BITS b = s390_vec_read_float##BITS(v2, 0);
\
+ uint8_t vxc, vec_exc = 0;
\
+ int cmp;
\
+
\
+ if (signal) {
\
+ cmp = float##BITS##_compare(a, b, &env->fpu_status);
\
+ } else {
\
+ cmp = float##BITS##_compare_quiet(a, b, &env->fpu_status);
\
+ }
\
+ vxc = check_ieee_exc(env, 0, false, &vec_exc);
\
+ handle_ieee_exc(env, vxc, vec_exc, retaddr);
\
+
\
+ return float_comp_to_cc(env, cmp);
\
}
+DEF_WFC(32)
+DEF_WFC(64)
+DEF_WFC(128)
-void HELPER(gvec_wfc64)(const void *v1, const void *v2, CPUS390XState *env,
- uint32_t desc)
-{
- env->cc_op = wfc64(v1, v2, env, false, GETPC());
+#define DEF_GVEC_WFC(BITS)
\
+void HELPER(gvec_wfc##BITS)(const void *v1, const void *v2, CPUS390XState
*env,\
+ uint32_t desc)
\
+{
\
+ env->cc_op = wfc##BITS(v1, v2, env, false, GETPC());
\
}
+DEF_GVEC_WFC(32)
+DEF_GVEC_WFC(64)
+DEF_GVEC_WFC(128)
-void HELPER(gvec_wfk64)(const void *v1, const void *v2, CPUS390XState *env,
- uint32_t desc)
-{
- env->cc_op = wfc64(v1, v2, env, true, GETPC());
+#define DEF_GVEC_WFK(BITS)
\
+void HELPER(gvec_wfk##BITS)(const void *v1, const void *v2, CPUS390XState
*env,\
+ uint32_t desc)
\
+{
\
+ env->cc_op = wfc##BITS(v1, v2, env, true, GETPC());
\
}
+DEF_GVEC_WFK(32)
+DEF_GVEC_WFK(64)
+DEF_GVEC_WFK(128)
typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status);
static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
--
2.26.2
- [PATCH v1 00/20] s390x/tcg: Implement Vector enhancements facility and switch to z14, David Hildenbrand, 2020/09/30
- [PATCH v1 01/20] softfloat: Implement float128_(min|minnum|minnummag|max|maxnum|maxnummag), David Hildenbrand, 2020/09/30
- [PATCH v1 03/20] s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICAL, David Hildenbrand, 2020/09/30
- [PATCH v1 05/20] s390x/tcg: Implement 32/128 bit for VECTOR FP DIVIDE, David Hildenbrand, 2020/09/30
- [PATCH v1 02/20] s390x/tcg: Implement VECTOR BIT PERMUTE, David Hildenbrand, 2020/09/30
- [PATCH v1 04/20] s390x/tcg: Implement 32/128 bit for VECTOR FP ADD, David Hildenbrand, 2020/09/30
- [PATCH v1 06/20] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY, David Hildenbrand, 2020/09/30
- [PATCH v1 08/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR,
David Hildenbrand <=
- [PATCH v1 07/20] s390x/tcg: Implement 32/128 bit for VECTOR FP SUBTRACT, David Hildenbrand, 2020/09/30
- [PATCH v1 10/20] s390x/tcg: Implement 32/128 bit for VECTOR LOAD FP INTEGER, David Hildenbrand, 2020/09/30
- [PATCH v1 09/20] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE *, David Hildenbrand, 2020/09/30
- [PATCH v1 11/20] s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED, David Hildenbrand, 2020/09/30
- [PATCH v1 12/20] s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED, David Hildenbrand, 2020/09/30
- [PATCH v1 13/20] s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION, David Hildenbrand, 2020/09/30
- [PATCH v1 14/20] s390x/tcg: Implement 32/128 bit for VECTOR FP SQUARE ROOT, David Hildenbrand, 2020/09/30
- [PATCH v1 16/20] s390x/tcg: Implement 32/128bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT), David Hildenbrand, 2020/09/30
- [PATCH v1 15/20] s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE, David Hildenbrand, 2020/09/30
- [PATCH v1 17/20] s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT), David Hildenbrand, 2020/09/30