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[PULL 18/31] target/s390x: Handle tec in s390_cpu_tlb_fill
From: |
David Hildenbrand |
Subject: |
[PULL 18/31] target/s390x: Handle tec in s390_cpu_tlb_fill |
Date: |
Thu, 10 Oct 2019 13:33:43 +0200 |
From: Richard Henderson <address@hidden>
As a step toward moving all excption handling out of mmu_translate,
copy handling of the LowCore tec value from trigger_access_exception
into s390_cpu_tlb_fill. So far this new plumbing isn't used.
Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
---
target/s390x/excp_helper.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c
index 552098be5f..ab2ed47fef 100644
--- a/target/s390x/excp_helper.c
+++ b/target/s390x/excp_helper.c
@@ -126,7 +126,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
S390CPU *cpu = S390_CPU(cs);
CPUS390XState *env = &cpu->env;
target_ulong vaddr, raddr;
- uint64_t asc;
+ uint64_t asc, tec;
int prot, fail, excp;
qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n",
@@ -162,6 +162,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
"%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n",
__func__, (uint64_t)raddr, (uint64_t)ram_size);
excp = PGM_ADDRESSING;
+ tec = 0; /* unused */
fail = 1;
}
@@ -178,6 +179,10 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
}
if (excp) {
+ if (excp != PGM_ADDRESSING) {
+ stq_phys(env_cpu(env)->as,
+ env->psa + offsetof(LowCore, trans_exc_code), tec);
+ }
trigger_pgm_exception(env, excp, ILEN_AUTO);
}
cpu_restore_state(cs, retaddr, true);
--
2.21.0
- [PULL 10/31] s390x/mmu: Implement Instruction-Execution-Protection Facility, (continued)
- [PULL 10/31] s390x/mmu: Implement Instruction-Execution-Protection Facility, David Hildenbrand, 2019/10/10
- [PULL 07/31] s390x/mmu: Convert to non-recursive page table walk, David Hildenbrand, 2019/10/10
- [PULL 11/31] s390x/cpumodel: Prepare for changes of QEMU model, David Hildenbrand, 2019/10/10
- [PULL 09/31] s390x/mmu: Implement ESOP-2 and access-exception-fetch/store-indication facility, David Hildenbrand, 2019/10/10
- [PULL 12/31] s390x/cpumodel: Add new TCG features to QEMU cpu model, David Hildenbrand, 2019/10/10
- [PULL 13/31] target/s390x: Add ilen to unwind data, David Hildenbrand, 2019/10/10
- [PULL 14/31] target/s390x: Remove ilen parameter from tcg_s390_program_interrupt, David Hildenbrand, 2019/10/10
- [PULL 15/31] target/s390x: Remove ilen parameter from s390_program_interrupt, David Hildenbrand, 2019/10/10
- [PULL 16/31] target/s390x: Use tcg_s390_program_interrupt in TCG helpers, David Hildenbrand, 2019/10/10
- [PULL 17/31] target/s390x: Push trigger_pgm_exception lower in s390_cpu_tlb_fill, David Hildenbrand, 2019/10/10
- [PULL 18/31] target/s390x: Handle tec in s390_cpu_tlb_fill,
David Hildenbrand <=
- [PULL 19/31] target/s390x: Return exception from mmu_translate_real, David Hildenbrand, 2019/10/10
- [PULL 20/31] target/s390x: Remove exc argument to mmu_translate_asce, David Hildenbrand, 2019/10/10
- [PULL 21/31] target/s390x: Return exception from mmu_translate, David Hildenbrand, 2019/10/10
- [PULL 22/31] target/s390x: Return exception from translate_pages, David Hildenbrand, 2019/10/10
- [PULL 23/31] target/s390x: Remove fail variable from s390_cpu_tlb_fill, David Hildenbrand, 2019/10/10
- [PULL 24/31] target/s390x: Simplify helper_lra, David Hildenbrand, 2019/10/10
- [PULL 25/31] target/s390x: Rely on unwinding in s390_cpu_tlb_fill, David Hildenbrand, 2019/10/10