[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 10/31] s390x/mmu: Implement Instruction-Execution-Protection Facil
From: |
David Hildenbrand |
Subject: |
[PULL 10/31] s390x/mmu: Implement Instruction-Execution-Protection Facility |
Date: |
Thu, 10 Oct 2019 13:33:35 +0200 |
IEP support in the mmu is fairly easy. Set the right permissions for TLB
entries and properly report an exception.
Make sure to handle EDAT-2 by setting bit 56/60/61 of the TEID (TEC) to
the right values.
Let's keep s390_cpu_get_phys_page_debug() working even if IEP is
active. Switch MMU_DATA_LOAD - this has no other effects any more as the
ASC to be used is now fully selected outside of mmu_translate().
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
---
target/s390x/cpu.h | 1 +
target/s390x/helper.c | 6 +++++-
target/s390x/mmu_helper.c | 21 +++++++++++++++++++++
3 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 2db54884b8..b907741858 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -315,6 +315,7 @@ extern const VMStateDescription vmstate_s390_cpu;
#define CR0_EDAT 0x0000000000800000ULL
#define CR0_AFP 0x0000000000040000ULL
#define CR0_VECTOR 0x0000000000020000ULL
+#define CR0_IEP 0x0000000000100000ULL
#define CR0_EMERGENCY_SIGNAL_SC 0x0000000000004000ULL
#define CR0_EXTERNAL_CALL_SC 0x0000000000002000ULL
#define CR0_CKC_SC 0x0000000000000800ULL
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index 948c0398d4..bf503b56ee 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -63,7 +63,11 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr
vaddr)
asc = PSW_ASC_PRIMARY;
}
- if (mmu_translate(env, vaddr, MMU_INST_FETCH, asc, &raddr, &prot, false)) {
+ /*
+ * We want to read code even if IEP is active. Use MMU_DATA_LOAD instead
+ * of MMU_INST_FETCH.
+ */
+ if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, false)) {
return -1;
}
return raddr;
diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c
index 06502bd25d..4a794dadcf 100644
--- a/target/s390x/mmu_helper.c
+++ b/target/s390x/mmu_helper.c
@@ -121,6 +121,8 @@ static int mmu_translate_asce(CPUS390XState *env,
target_ulong vaddr,
const bool edat1 = (env->cregs[0] & CR0_EDAT) &&
s390_has_feat(S390_FEAT_EDAT);
const bool edat2 = edat1 && s390_has_feat(S390_FEAT_EDAT_2);
+ const bool iep = (env->cregs[0] & CR0_IEP) &&
+ s390_has_feat(S390_FEAT_INSTRUCTION_EXEC_PROT);
const int asce_tl = asce & ASCE_TABLE_LENGTH;
const int asce_p = asce & ASCE_PRIVATE_SPACE;
hwaddr gaddr = asce & ASCE_ORIGIN;
@@ -225,6 +227,9 @@ static int mmu_translate_asce(CPUS390XState *env,
target_ulong vaddr,
*flags &= ~PAGE_WRITE;
}
if (edat2 && (entry & REGION3_ENTRY_FC)) {
+ if (iep && (entry & REGION3_ENTRY_IEP)) {
+ *flags &= ~PAGE_EXEC;
+ }
*raddr = (entry & REGION3_ENTRY_RFAA) |
(vaddr & ~REGION3_ENTRY_RFAA);
return 0;
@@ -252,6 +257,9 @@ static int mmu_translate_asce(CPUS390XState *env,
target_ulong vaddr,
*flags &= ~PAGE_WRITE;
}
if (edat1 && (entry & SEGMENT_ENTRY_FC)) {
+ if (iep && (entry & SEGMENT_ENTRY_IEP)) {
+ *flags &= ~PAGE_EXEC;
+ }
*raddr = (entry & SEGMENT_ENTRY_SFAA) |
(vaddr & ~SEGMENT_ENTRY_SFAA);
return 0;
@@ -272,6 +280,9 @@ static int mmu_translate_asce(CPUS390XState *env,
target_ulong vaddr,
if (entry & PAGE_ENTRY_P) {
*flags &= ~PAGE_WRITE;
}
+ if (iep && (entry & PAGE_ENTRY_IEP)) {
+ *flags &= ~PAGE_EXEC;
+ }
*raddr = entry & TARGET_PAGE_MASK;
return 0;
@@ -430,6 +441,16 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr,
int rw, uint64_t asc,
return -1;
}
+ /* check for Instruction-Execution-Protection */
+ if (unlikely(rw == MMU_INST_FETCH && !(*flags & PAGE_EXEC))) {
+ if (exc) {
+ /* IEP sets bit 56 and 61 */
+ tec |= 0x84;
+ trigger_access_exception(env, PGM_PROTECTION, ilen, tec);
+ }
+ return -1;
+ }
+
nodat:
/* Convert real address -> absolute address */
*raddr = mmu_real2abs(env, *raddr);
--
2.21.0
- [PULL 00/31] s390x/tcg update, David Hildenbrand, 2019/10/10
- [PULL 01/31] s390x/mmu: Drop debug logging from MMU code, David Hildenbrand, 2019/10/10
- [PULL 02/31] s390x/mmu: Move DAT protection handling out of mmu_translate_asce(), David Hildenbrand, 2019/10/10
- [PULL 03/31] s390x/mmu: Inject DAT exceptions from a single place, David Hildenbrand, 2019/10/10
- [PULL 05/31] s390x/mmu: Use TARGET_PAGE_MASK in mmu_translate_pte(), David Hildenbrand, 2019/10/10
- [PULL 04/31] s390x/mmu: Inject PGM_ADDRESSING on bogus table addresses, David Hildenbrand, 2019/10/10
- [PULL 08/31] s390x/mmu: Add EDAT2 translation support, David Hildenbrand, 2019/10/10
- [PULL 06/31] s390x/mmu: DAT table definition overhaul, David Hildenbrand, 2019/10/10
- [PULL 10/31] s390x/mmu: Implement Instruction-Execution-Protection Facility,
David Hildenbrand <=
- [PULL 07/31] s390x/mmu: Convert to non-recursive page table walk, David Hildenbrand, 2019/10/10
- [PULL 11/31] s390x/cpumodel: Prepare for changes of QEMU model, David Hildenbrand, 2019/10/10
- [PULL 09/31] s390x/mmu: Implement ESOP-2 and access-exception-fetch/store-indication facility, David Hildenbrand, 2019/10/10
- [PULL 12/31] s390x/cpumodel: Add new TCG features to QEMU cpu model, David Hildenbrand, 2019/10/10
- [PULL 13/31] target/s390x: Add ilen to unwind data, David Hildenbrand, 2019/10/10
- [PULL 14/31] target/s390x: Remove ilen parameter from tcg_s390_program_interrupt, David Hildenbrand, 2019/10/10
- [PULL 15/31] target/s390x: Remove ilen parameter from s390_program_interrupt, David Hildenbrand, 2019/10/10
- [PULL 16/31] target/s390x: Use tcg_s390_program_interrupt in TCG helpers, David Hildenbrand, 2019/10/10
- [PULL 17/31] target/s390x: Push trigger_pgm_exception lower in s390_cpu_tlb_fill, David Hildenbrand, 2019/10/10
- [PULL 18/31] target/s390x: Handle tec in s390_cpu_tlb_fill, David Hildenbrand, 2019/10/10