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[qemu-s390x] [PULL 35/46] s390x/tcg: indicate value of TODPR in STCKE
From: |
Cornelia Huck |
Subject: |
[qemu-s390x] [PULL 35/46] s390x/tcg: indicate value of TODPR in STCKE |
Date: |
Thu, 14 Dec 2017 18:09:53 +0100 |
From: David Hildenbrand <address@hidden>
We were not yet using the value of the TOD Programmable Register.
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
---
target/s390x/translate.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index d13f531c5b..38e1770e5e 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -3897,7 +3897,10 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
{
TCGv_i64 c1 = tcg_temp_new_i64();
TCGv_i64 c2 = tcg_temp_new_i64();
+ TCGv_i64 todpr = tcg_temp_new_i64();
gen_helper_stck(c1, cpu_env);
+ /* 16 bit value store in an uint32_t (only valid bits set) */
+ tcg_gen_ld32u_i64(todpr, cpu_env, offsetof(CPUS390XState, todpr));
/* Shift the 64-bit value into its place as a zero-extended
104-bit value. Note that "bit positions 64-103 are always
non-zero so that they compare differently to STCK"; we set
@@ -3905,11 +3908,13 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
tcg_gen_shli_i64(c2, c1, 56);
tcg_gen_shri_i64(c1, c1, 8);
tcg_gen_ori_i64(c2, c2, 0x10000);
+ tcg_gen_or_i64(c2, c2, todpr);
tcg_gen_qemu_st64(c1, o->in2, get_mem_index(s));
tcg_gen_addi_i64(o->in2, o->in2, 8);
tcg_gen_qemu_st64(c2, o->in2, get_mem_index(s));
tcg_temp_free_i64(c1);
tcg_temp_free_i64(c2);
+ tcg_temp_free_i64(todpr);
/* ??? We don't implement clock states. */
gen_op_movi_cc(s, 0);
return NO_EXIT;
--
2.13.6
- [qemu-s390x] [PULL 25/46] s390x/pci: rework PCI STORE BLOCK, (continued)
- [qemu-s390x] [PULL 25/46] s390x/pci: rework PCI STORE BLOCK, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 26/46] s390x/pci: move the memory region read from pcilg, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 27/46] s390x/pci: move the memory region write from pcistg, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 28/46] s390x/pci: search for subregion inside the BARs, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 29/46] s390x/css: unrestrict cssids, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 30/46] s390x: deprecate s390-squash-mcss machine prop, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 31/46] s390x/css: attach css bridge, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 32/46] s390x/kvm: factor out build_channel_report_mcic() into cpu.h, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 33/46] s390x/tcg: fix and cleanup mcck injection, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 34/46] s390x/tcg: implement SET CLOCK PROGRAMMABLE FIELD, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 35/46] s390x/tcg: indicate value of TODPR in STCKE,
Cornelia Huck <=
- [qemu-s390x] [PULL 36/46] s390x/tcg: wire up STORE CHANNEL REPORT WORD, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 37/46] s390x/tcg: ASI/ASGI/ALSI/ALSGI are atomic with Interlocked-acccess facility 1, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 39/46] s390x/tcg: wire up SET ADDRESS LIMIT, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 38/46] s390x/tcg: implement Interlocked-Access Facility 2, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 40/46] s390x/tcg: wire up SET CHANNEL MONITOR, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 41/46] s390x/tcg: Implement STORE CHANNEL PATH STATUS, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 42/46] s390x/tcg: Implement SIGNAL ADAPTER instruction, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 44/46] s390x/tcg: we already implement the Set-Program-Parameter facility, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 43/46] s390x/tcg: implement extract-CPU-time facility, Cornelia Huck, 2017/12/14
- [qemu-s390x] [PULL 46/46] s390-ccw-virtio: allow for systems larger that 7.999TB, Cornelia Huck, 2017/12/14